About the Execution of ITS-Tools for DLCround-PT-08a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
378.210 | 4834.00 | 11303.00 | 71.90 | TTTTTTTTTFFFTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is DLCround-PT-08a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r180-csrt-149580964400295
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-0
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-1
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-15
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-2
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-3
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-4
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-5
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-6
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-7
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-8
FORMULA_NAME DLCround-PT-08a-ReachabilityCardinality-9
=== Now, execution of the tool begins
BK_START 1496568005355
Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-reach command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_08a\_flat\_flat\_mod,2.401e+12,0.750523,14644,322,21,4604,792,2039,4146,68,869,0
Total reachable state count : 2401000000001
Verifying 16 reachability properties.
Invariant property DLCround-PT-08a-ReachabilityCardinality-0 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-0,0,0.752857,14744,1,0,4604,792,2063,4146,80,869,410
Invariant property DLCround-PT-08a-ReachabilityCardinality-1 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-1,0,0.753049,14812,1,0,4604,792,2067,4146,82,869,410
Invariant property DLCround-PT-08a-ReachabilityCardinality-2 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-2 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-2,0,0.753666,14812,1,0,4604,792,2078,4146,84,869,598
Invariant property DLCround-PT-08a-ReachabilityCardinality-3 does not hold.
FORMULA DLCround-PT-08a-ReachabilityCardinality-3 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-3,1.94481e+10,0.755709,14812,167,49,4604,792,2107,4146,90,869,1114
Reachability property DLCround-PT-08a-ReachabilityCardinality-4 does not hold.
FORMULA DLCround-PT-08a-ReachabilityCardinality-4 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-08a-ReachabilityCardinality-4
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-4,0,0.757178,14812,1,0,4604,792,2121,4146,93,869,1484
Reachability property DLCround-PT-08a-ReachabilityCardinality-5 does not hold.
FORMULA DLCround-PT-08a-ReachabilityCardinality-5 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-08a-ReachabilityCardinality-5
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-5,0,0.757681,14812,1,0,4604,792,2130,4146,94,869,1567
Invariant property DLCround-PT-08a-ReachabilityCardinality-6 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-6,0,0.757966,14812,1,0,4604,792,2134,4146,94,869,1691
Reachability property DLCround-PT-08a-ReachabilityCardinality-7 does not hold.
FORMULA DLCround-PT-08a-ReachabilityCardinality-7 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-08a-ReachabilityCardinality-7
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-7,0,0.758555,14812,1,0,4604,792,2150,4146,94,869,1881
Reachability property DLCround-PT-08a-ReachabilityCardinality-8 does not hold.
FORMULA DLCround-PT-08a-ReachabilityCardinality-8 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-08a-ReachabilityCardinality-8
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-8,0,0.760428,14812,1,0,4604,792,2170,4146,100,869,2211
Invariant property DLCround-PT-08a-ReachabilityCardinality-9 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-9 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-9,0,0.761318,14812,1,0,4604,792,2188,4146,103,869,2343
Invariant property DLCround-PT-08a-ReachabilityCardinality-10 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-10,0,0.761792,14812,1,0,4604,792,2192,4146,103,869,2443
Invariant property DLCround-PT-08a-ReachabilityCardinality-11 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-11,0,0.762342,14812,1,0,4604,792,2199,4146,103,869,2553
Invariant property DLCround-PT-08a-ReachabilityCardinality-12 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-12,0,0.763744,14812,1,0,4604,792,2209,4146,103,869,2901
Invariant property DLCround-PT-08a-ReachabilityCardinality-13 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-13,0,0.764124,14812,1,0,4604,792,2213,4146,103,869,2953
Invariant property DLCround-PT-08a-ReachabilityCardinality-14 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-14,0,0.764607,14812,1,0,4604,792,2216,4146,103,869,3197
Invariant property DLCround-PT-08a-ReachabilityCardinality-15 is true.
FORMULA DLCround-PT-08a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-08a-ReachabilityCardinality-15,0,0.764972,14812,1,0,4604,792,2223,4146,103,869,3300
// Phase 1: matrix 1907 rows 263 cols
Exit code :0
invariant : 1'p0 + 1'p152= 1
invariant : 1'p0 + 1'p181= 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
invariant : 1'p0 + 1'p143= 1
invariant : 1'p0 + 1'p246= 1
invariant : 1'p0 + 1'p232= 1
invariant : 1'p0 + 1'p159= 1
invariant : 1'p0 + 1'p199= 1
invariant : 1'p0 + 1'p8 + 1'p9 + 1'p10 + 1'p11 + 1'p12 + 1'p13 + 1'p14= 1
invariant : 1'p0 + 1'p145= 1
invariant : 1'p0 + 1'p220= 1
invariant : 1'p0 + 1'p158= 1
invariant : 1'p0 + 1'p245= 1
invariant : 1'p0 + 1'p144= 1
invariant : 1'p0 + 1'p154= 1
invariant : 1'p0 + 1'p258= 1
invariant : 1'p0 + 1'p236= 1
invariant : 1'p0 + 1'p206= 1
invariant : 1'p0 + 1'p153= 1
invariant : 1'p0 + 1'p207= 1
invariant : 1'p0 + 1'p251= 1
invariant : 1'p0 + 1'p173= 1
invariant : 1'p0 + 1'p231= 1
invariant : 1'p0 + 1'p128= 1
invariant : 1'p0 + 1'p120= 1
invariant : 1'p0 + 1'p223= 1
invariant : 1'p0 + 1'p131= 1
invariant : 1'p0 + 1'p260= 1
invariant : 1'p0 + 1'p237= 1
invariant : 1'p0 + 1'p119= 1
invariant : 1'p0 + 1'p225= 1
invariant : 1'p0 + 1'p163= 1
invariant : 1'p0 + 1'p151= 1
invariant : 1'p0 + 1'p234= 1
invariant : 1'p0 + 1'p39 + 1'p40 + 1'p41 + 1'p42 + 1'p43 + 1'p44 + 1'p45 + 1'p46 + 1'p47 + 1'p48= 1
invariant : 1'p0 + 1'p122= 1
invariant : 1'p0 + 1'p201= 1
invariant : 1'p0 + 1'p218= 1
invariant : 1'p0 + 1'p183= 1
invariant : 1'p0 + 1'p252= 1
invariant : 1'p0 + 1'p226= 1
invariant : 1'p0 + 1'p22 + 1'p23 + 1'p24 + 1'p25 + 1'p26 + 1'p27 + 1'p28= 1
invariant : 1'p0 + 1'p165= 1
invariant : 1'p0 + 1'p238= 1
invariant : 1'p0 + 1'p216= 1
invariant : 1'p0 + 1'p229= 1
invariant : 1'p0 + 1'p196= 1
invariant : 1'p0 + 1'p132= 1
invariant : 1'p0 + 1'p250= 1
invariant : 1'p0 + 1'p215= 1
invariant : 1'p0 + 1'p241= 1
invariant : 1'p0 + 1'p126= 1
invariant : 1'p0 + 1'p123= 1
invariant : 1'p0 + 1'p139= 1
invariant : 1'p0 + 1'p189= 1
invariant : 1'p0 + 1'p244= 1
invariant : 1'p0 + 1'p184= 1
invariant : 1'p0 + 1'p178= 1
invariant : 1'p0 + 1'p240= 1
invariant : 1'p0 + 1'p138= 1
invariant : 1'p0 + 1'p121= 1
invariant : 1'p0 + 1'p204= 1
invariant : 1'p0 + 1'p124= 1
invariant : 1'p0 + 1'p193= 1
invariant : 1'p0 + 1'p150= 1
invariant : 1'p0 + 1'p249= 1
invariant : 1'p0 + 1'p125= 1
invariant : 1'p0 + 1'p187= 1
invariant : 1'p0 + 1'p254= 1
invariant : 1'p0 + 1'p247= 1
invariant : 1'p0 + 1'p212= 1
invariant : 1'p0 + 1'p186= 1
invariant : 1'p0 + 1'p136= 1
invariant : 1'p0 + 1'p253= 1
invariant : 1'p0 + 1'p203= 1
BK_STOP 1496568010189
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityCardinality -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 04, 2017 9:20:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 169 ms
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 263 places.
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1907 transitions.
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 318 ms
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 04, 2017 9:20:07 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 218 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 262 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 3108 redundant transitions.
Jun 04, 2017 9:20:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 95 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 751 ms.
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-0(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-1(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-2(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-3(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-4(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-5(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-6(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-7(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-8(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-9(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-10(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-11(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-12(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-13(UNSAT) depth K=0 took 0 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-14(UNSAT) depth K=0 took 1 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-15(UNSAT) depth K=0 took 2 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-0(UNSAT) depth K=1 took 7 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-1(UNSAT) depth K=1 took 5 ms
Jun 04, 2017 9:20:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-2(UNSAT) depth K=1 took 10 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-3(UNSAT) depth K=1 took 12 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-4(UNSAT) depth K=1 took 16 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-5(UNSAT) depth K=1 took 6 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-6(UNSAT) depth K=1 took 18 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-7(UNSAT) depth K=1 took 7 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-8(UNSAT) depth K=1 took 5 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-9(UNSAT) depth K=1 took 12 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-10(UNSAT) depth K=1 took 12 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-12(UNSAT) depth K=1 took 20 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-13(UNSAT) depth K=1 took 5 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-14(UNSAT) depth K=1 took 8 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-08a-ReachabilityCardinality-15(UNSAT) depth K=1 took 15 ms
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
Read property : DLCround-PT-08a-ReachabilityCardinality-0 with value :(((!(u117.p222>=2))&&((u94.p199>=1)||((u9.p73==0)||(u3.p21==1))))||(!(((u129.p234==0)||(u120.p225==1))&&(u10.p88>=1))))
Read property : DLCround-PT-08a-ReachabilityCardinality-1 with value :(!(u150.p255>=3))
Read property : DLCround-PT-08a-ReachabilityCardinality-2 with value :(((u70.p175==0)||(u12.p107==1))||((u47.p152==0)||(u126.p231==1)))
Read property : DLCround-PT-08a-ReachabilityCardinality-3 with value :(((((u6.p42==0)||(u7.p53==1))||((u9.p78==0)||(u10.p79==1)))||(u85.p190>=3))&&((((u90.p195==0)||(u19.p124==1))||((u123.p228==0)||(u141.p246==1)))||(!(u74.p179>=2))))
Read property : DLCround-PT-08a-ReachabilityCardinality-4 with value :((u95.p200>=2)&&(!(((u10.p83==0)||(u7.p58==1))&&((u1.p4==0)||(u114.p219==1)))))
Read property : DLCround-PT-08a-ReachabilityCardinality-5 with value :(((u104.p209>=1)||((u72.p177>=1)&&(u126.p231>=1)))&&(u7.p54>=3))
Read property : DLCround-PT-08a-ReachabilityCardinality-6 with value :((u97.p202==0)||(u152.p257==1))
Read property : DLCround-PT-08a-ReachabilityCardinality-7 with value :((!((u7.p56>=1)&&((u13.p113==0)||(u127.p232==1))))&&(!((u158.p0>=3)||((u145.p250==0)||(u65.p170==1)))))
Read property : DLCround-PT-08a-ReachabilityCardinality-8 with value :((!(((u7.p51==0)||(u154.p259==1))||((u8.p66==0)||(u1.p5==1))))||((u7.p52>=2)||((u6.p41>=3)||(u5.p37>=3))))
Read property : DLCround-PT-08a-ReachabilityCardinality-9 with value :((((u8.p66>=3)&&(u63.p168>=2))||((u9.p75>=1)&&(u53.p158>=1)))||(!((u12.p99>=2)&&(u62.p167>=2))))
Read property : DLCround-PT-08a-ReachabilityCardinality-10 with value :((u86.p191==0)||(u42.p147==1))
Read property : DLCround-PT-08a-ReachabilityCardinality-11 with value :((u71.p176>=3)||((u74.p179==0)||(u30.p135==1)))
Read property : DLCround-PT-08a-ReachabilityCardinality-12 with value :(((!(u156.p261>=2))||(!((u116.p221==0)||(u76.p181==1))))||(u46.p151>=1))
Read property : DLCround-PT-08a-ReachabilityCardinality-13 with value :((u82.p187==0)||(u62.p167==1))
Read property : DLCround-PT-08a-ReachabilityCardinality-14 with value :((u145.p250==0)||(u35.p140==1))
Read property : DLCround-PT-08a-ReachabilityCardinality-15 with value :((u118.p223>=3)||(!((u10.p82>=2)&&(u135.p240>=1))))
built 289 ordering constraints for composite.
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 04, 2017 9:20:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 157 place invariants in 267 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-08a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-08a.tgz
mv DLCround-PT-08a execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is DLCround-PT-08a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r180-csrt-149580964400295"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;