About the Execution of ITS-Tools for BART-PT-002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
771.580 | 37454.00 | 86770.00 | 192.90 | FTTFFTTFTTFTTTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-3253
Executing tool itstools
Input is BART-PT-002, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r170-ebro-149580922100081
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-002-ReachabilityFireability-0
FORMULA_NAME BART-COL-002-ReachabilityFireability-1
FORMULA_NAME BART-COL-002-ReachabilityFireability-10
FORMULA_NAME BART-COL-002-ReachabilityFireability-11
FORMULA_NAME BART-COL-002-ReachabilityFireability-12
FORMULA_NAME BART-COL-002-ReachabilityFireability-13
FORMULA_NAME BART-COL-002-ReachabilityFireability-14
FORMULA_NAME BART-COL-002-ReachabilityFireability-15
FORMULA_NAME BART-COL-002-ReachabilityFireability-2
FORMULA_NAME BART-COL-002-ReachabilityFireability-3
FORMULA_NAME BART-COL-002-ReachabilityFireability-4
FORMULA_NAME BART-COL-002-ReachabilityFireability-5
FORMULA_NAME BART-COL-002-ReachabilityFireability-6
FORMULA_NAME BART-COL-002-ReachabilityFireability-7
FORMULA_NAME BART-COL-002-ReachabilityFireability-8
FORMULA_NAME BART-COL-002-ReachabilityFireability-9
=== Now, execution of the tool begins
BK_START 1496628207166
Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-reach command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
FORMULA BART-COL-002-ReachabilityFireability-2 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-3 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-4 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-5 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 2282 rows 462 cols
FORMULA BART-COL-002-ReachabilityFireability-8 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-9 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-11 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA BART-COL-002-ReachabilityFireability-14 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 2282 rows 462 cols
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART\_PT\_002\_flat\_flat,53824,3.50642,48868,2,1804,5,166148,6,0,3131,218977,0
Total reachable state count : 53824
Verifying 16 reachability properties.
Invariant property BART-COL-002-ReachabilityFireability-0 does not hold.
FORMULA BART-COL-002-ReachabilityFireability-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-0,40,3.51356,49148,2,531,6,166148,7,0,3134,218977,0
Reachability property BART-COL-002-ReachabilityFireability-1 is true.
FORMULA BART-COL-002-ReachabilityFireability-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-1,40,3.51453,49216,2,531,6,166148,7,0,3134,218977,0
Invariant property BART-COL-002-ReachabilityFireability-2 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-2,0,3.828,49216,1,0,6,166148,8,0,4519,218977,0
Invariant property BART-COL-002-ReachabilityFireability-3 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-3,0,4.18823,49428,1,0,6,166148,8,0,4519,218977,0
Reachability property BART-COL-002-ReachabilityFireability-4 does not hold.
No reachable states exhibit your property : BART-COL-002-ReachabilityFireability-4
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-4,0,4.71321,49428,1,0,6,166148,8,0,4519,218977,0
Invariant property BART-COL-002-ReachabilityFireability-5 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-5,0,5.79741,49464,1,0,6,166148,9,0,5802,218977,0
Reachability property BART-COL-002-ReachabilityFireability-6 is true.
FORMULA BART-COL-002-ReachabilityFireability-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-6,1,6.10073,49480,2,463,7,166148,10,0,5810,218977,0
Reachability property BART-COL-002-ReachabilityFireability-7 is true.
FORMULA BART-COL-002-ReachabilityFireability-7 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-7,2,7.45319,49480,2,675,8,166148,11,0,6450,218977,0
Reachability property BART-COL-002-ReachabilityFireability-8 does not hold.
No reachable states exhibit your property : BART-COL-002-ReachabilityFireability-8
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-8,0,8.111,49488,1,0,8,166148,12,0,6451,218977,0
Invariant property BART-COL-002-ReachabilityFireability-9 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-9,0,8.99641,49488,1,0,8,166148,13,0,6452,218977,0
Reachability property BART-COL-002-ReachabilityFireability-10 is true.
FORMULA BART-COL-002-ReachabilityFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-10,40,8.99754,49488,2,531,8,166148,13,0,6452,218977,0
Reachability property BART-COL-002-ReachabilityFireability-11 does not hold.
No reachable states exhibit your property : BART-COL-002-ReachabilityFireability-11
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-11,0,9.41683,49488,1,0,8,166148,14,0,6453,218977,0
Invariant property BART-COL-002-ReachabilityFireability-12 does not hold.
FORMULA BART-COL-002-ReachabilityFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-12,1,9.56002,49488,2,463,8,166148,15,0,6454,218977,0
Reachability property BART-COL-002-ReachabilityFireability-13 is true.
FORMULA BART-COL-002-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-13,40,9.56093,49488,2,531,8,166148,15,0,6454,218977,0
Invariant property BART-COL-002-ReachabilityFireability-14 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-14,0,10.0128,49488,1,0,8,166148,15,0,6454,218977,0
Reachability property BART-COL-002-ReachabilityFireability-15 does not hold.
FORMULA BART-COL-002-ReachabilityFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : BART-COL-002-ReachabilityFireability-15
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART-COL-002-ReachabilityFireability-15,0,10.6355,49488,1,0,8,166148,16,0,6849,218977,0
Exit code :0
BK_STOP 1496628244620
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityFireability -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 05, 2017 2:03:29 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 05, 2017 2:03:30 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 430 ms
Jun 05, 2017 2:03:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 734 places.
Jun 05, 2017 2:03:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2282 transitions.
Jun 05, 2017 2:03:34 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 272 fixed domain variables (out of 734 variables) in GAL type BART_PT_002
Jun 05, 2017 2:03:34 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Found a total of 272 constant array cells/variables (out of 734 variables) in type BART_PT_002
Jun 05, 2017 2:03:34 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: NewDistTable_36_1_35,DistStation_12,StopTable_0_0,NewDistTable_8_1_7,NewDistTable_22_5_17,NewDistTable_37_1_36,NewDistTable_33_2_31,NewDistTable_36_2_34,NewDistTable_21_3_18,NewDistTable_20_0_20,NewDistTable_2_2_0,NewDistTable_4_4_0,NewDistTable_8_4_4,NewDistTable_22_2_20,NewDistTable_3_0_3,NewDistTable_20_5_15,NewDistTable_20_1_19,NewDistTable_8_5_3,NewDistTable_15_3_12,DistStation_13,NewDistTable_34_1_33,NewDistTable_35_1_34,NewDistTable_7_2_5,NewDistTable_6_2_4,NewDistTable_26_0_26,DistStation_17,NewDistTable_35_5_30,NewDistTable_40_5_35,NewDistTable_14_2_12,NewDistTable_3_3_0,NewDistTable_33_0_33,DistStation_23,NewDistTable_8_2_6,NewDistTable_25_2_23,NewDistTable_8_0_8,DistStation_20,NewDistTable_29_1_28,NewDistTable_2_0_2,NewDistTable_2_1_1,NewDistTable_13_0_13,NewDistTable_29_0_29,NewDistTable_40_3_37,NewDistTable_21_4_17,NewDistTable_25_3_22,NewDistTable_30_5_25,NewDistTable_13_2_11,DistStation_5,NewDistTable_3_2_1,NewDistTable_24_5_19,NewDistTable_10_3_7,StopTable_3_6,NewDistTable_6_1_5,NewDistTable_12_1_11,NewDistTable_11_1_10,NewDistTable_34_4_30,NewDistTable_26_2_24,NewDistTable_37_4_33,NewDistTable_33_5_28,NewDistTable_5_0_5,NewDistTable_32_5_27,NewDistTable_31_3_28,NewDistTable_28_2_26,NewDistTable_19_2_17,NewDistTable_38_1_37,NewDistTable_33_1_32,NewDistTable_39_0_39,NewDistTable_37_3_34,NewDistTable_4_0_4,NewDistTable_18_2_16,NewDistTable_27_5_22,StopTable_2_3,NewDistTable_28_0_28,NewDistTable_27_4_23,NewDistTable_30_3_27,NewDistTable_5_3_2,NewDistTable_24_3_21,StopTable_5_15,NewDistTable_15_0_15,NewDistTable_31_1_30,NewDistTable_25_5_20,NewDistTable_16_1_15,NewDistTable_22_0_22,NewDistTable_15_5_10,NewDistTable_10_5_5,NewDistTable_22_1_21,NewDistTable_39_3_36,NewDistTable_19_5_14,DistStation_6,NewDistTable_15_1_14,NewDistTable_31_0_31,NewDistTable_27_1_26,NewDistTable_30_1_29,DistStation_18,NewDistTable_16_5_11,NewDistTable_27_2_25,NewDistTable_5_5_0,NewDistTable_33_4_29,NewDistTable_14_4_10,DistStation_35,DistStation_26,NewDistTable_31_5_26,NewDistTable_22_3_19,DistStation_34,NewDistTable_25_1_24,NewDistTable_6_3_3,NewDistTable_26_5_21,NewDistTable_36_0_36,NewDistTable_12_5_7,NewDistTable_24_2_22,NewDistTable_24_0_24,NewDistTable_32_4_28,NewDistTable_32_3_29,NewDistTable_30_0_30,NewDistTable_29_3_26,NewDistTable_28_3_25,DistStation_40,NewDistTable_36_3_33,DistStation_24,NewDistTable_16_3_13,DistStation_11,NewDistTable_35_3_32,DistStation_7,NewDistTable_29_5_24,NewDistTable_21_5_16,NewDistTable_40_2_38,NewDistTable_6_4_2,NewDistTable_27_0_27,StopTable_4_10,NewDistTable_10_1_9,DistStation_37,NewDistTable_15_4_11,NewDistTable_28_5_23,NewDistTable_9_5_4,NewDistTable_19_1_18,NewDistTable_36_5_31,NewDistTable_35_2_33,NewDistTable_4_1_3,DistStation_25,NewDistTable_11_3_8,NewDistTable_7_3_4,NewDistTable_4_3_1,NewDistTable_10_2_8,NewDistTable_8_3_5,NewDistTable_6_5_1,NewDistTable_6_0_6,NewDistTable_26_4_22,NewDistTable_23_1_22,NewDistTable_39_5_34,NewDistTable_7_5_2,NewDistTable_21_0_21,DistStation_33,NewDistTable_40_1_39,DistStation_29,NewDistTable_23_2_21,NewDistTable_32_0_32,DistStation_8,NewDistTable_32_1_31,NewDistTable_37_2_35,NewDistTable_20_4_16,NewDistTable_9_3_6,NewDistTable_18_5_13,DistStation_19,NewDistTable_17_5_12,NewDistTable_1_0_1,NewDistTable_28_1_27,NewDistTable_23_4_19,NewDistTable_11_4_7,NewDistTable_16_4_12,NewDistTable_11_0_11,NewDistTable_14_3_11,NewDistTable_13_3_10,NewDistTable_17_4_13,NewDistTable_10_0_10,NewDistTable_14_0_14,NewDistTable_9_0_9,NewDistTable_20_3_17,NewDistTable_7_4_3,NewDistTable_21_2_19,NewDistTable_7_1_6,NewDistTable_17_3_14,DistStation_22,NewDistTable_31_4_27,DistStation_16,NewDistTable_11_5_6,NewDistTable_17_0_17,NewDistTable_10_4_6,NewDistTable_18_1_17,NewDistTable_20_2_18,NewDistTable_5_2_3,NewDistTable_28_4_24,NewDistTable_13_1_12,NewDistTable_17_1_16,NewDistTable_9_2_7,NewDistTable_24_4_20,NewDistTable_30_4_26,DistStation_32,DistStation_15,DistStation_27,NewDistTable_27_3_24,DistStation_9,NewDistTable_12_0_12,NewDistTable_21_1_20,DistStation_31,NewDistTable_39_1_38,NewDistTable_3_1_2,NewDistTable_18_3_15,NewDistTable_31_2_29,NewDistTable_22_4_18,NewDistTable_33_3_30,NewDistTable_23_3_20,NewDistTable_12_2_10,NewDistTable_17_2_15,NewDistTable_19_4_15,NewDistTable_1_1_0,NewDistTable_13_5_8,NewDistTable_14_1_13,NewDistTable_38_5_33,NewDistTable_26_1_25,DistStation_38,NewDistTable_18_0_18,NewDistTable_14_5_9,NewDistTable_39_4_35,NewDistTable_38_4_34,NewDistTable_38_3_35,NewDistTable_34_0_34,DistStation_21,DistStation_28,DistStation_39,DistStation_36,NewDistTable_37_5_32,NewDistTable_7_0_7,DistStation_30,NewDistTable_40_4_36,NewDistTable_9_4_5,DistStation_14,NewDistTable_25_0_25,NewDistTable_39_2_37,NewDistTable_35_4_31,NewDistTable_15_2_13,NewDistTable_23_5_18,NewDistTable_26_3_23,NewDistTable_18_4_14,NewDistTable_11_2_9,NewDistTable_25_4_21,NewDistTable_40_0_40,NewDistTable_29_2_27,NewDistTable_34_3_31,NewDistTable_30_2_28,NewDistTable_5_4_1,NewDistTable_24_1_23,DistStation_10,NewDistTable_12_4_8,NewDistTable_5_1_4,NewDistTable_38_2_36,NewDistTable_16_2_14,NewDistTable_19_3_16,NewDistTable_16_0_16,NewDistTable_13_4_9,NewDistTable_37_0_37,NewDistTable_9_1_8,NewDistTable_35_0_35,StopTable_1_1,NewDistTable_36_4_32,NewDistTable_23_0_23,NewDistTable_34_2_32,NewDistTable_4_2_2,NewDistTable_29_4_25,NewDistTable_19_0_19,NewDistTable_32_2_30,NewDistTable_34_5_29,NewDistTable_12_3_9,NewDistTable_38_0_38,
Jun 05, 2017 2:03:50 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 272 constant variables :NewDistTable_36_1_35, DistStation_12, StopTable_0_0, NewDistTable_8_1_7, NewDistTable_22_5_17, NewDistTable_37_1_36, NewDistTable_33_2_31, NewDistTable_36_2_34, NewDistTable_21_3_18, NewDistTable_20_0_20, NewDistTable_2_2_0, NewDistTable_4_4_0, NewDistTable_8_4_4, NewDistTable_22_2_20, NewDistTable_3_0_3, NewDistTable_20_5_15, NewDistTable_20_1_19, NewDistTable_8_5_3, NewDistTable_15_3_12, DistStation_13, NewDistTable_34_1_33, NewDistTable_35_1_34, NewDistTable_7_2_5, NewDistTable_6_2_4, NewDistTable_26_0_26, DistStation_17, NewDistTable_35_5_30, NewDistTable_40_5_35, NewDistTable_14_2_12, NewDistTable_3_3_0, NewDistTable_33_0_33, DistStation_23, NewDistTable_8_2_6, NewDistTable_25_2_23, NewDistTable_8_0_8, DistStation_20, NewDistTable_29_1_28, NewDistTable_2_0_2, NewDistTable_2_1_1, NewDistTable_13_0_13, NewDistTable_29_0_29, NewDistTable_40_3_37, NewDistTable_21_4_17, NewDistTable_25_3_22, NewDistTable_30_5_25, NewDistTable_13_2_11, DistStation_5, NewDistTable_3_2_1, NewDistTable_24_5_19, NewDistTable_10_3_7, StopTable_3_6, NewDistTable_6_1_5, NewDistTable_12_1_11, NewDistTable_11_1_10, NewDistTable_34_4_30, NewDistTable_26_2_24, NewDistTable_37_4_33, NewDistTable_33_5_28, NewDistTable_5_0_5, NewDistTable_32_5_27, NewDistTable_31_3_28, NewDistTable_28_2_26, NewDistTable_19_2_17, NewDistTable_38_1_37, NewDistTable_33_1_32, NewDistTable_39_0_39, NewDistTable_37_3_34, NewDistTable_4_0_4, NewDistTable_18_2_16, NewDistTable_27_5_22, StopTable_2_3, NewDistTable_28_0_28, NewDistTable_27_4_23, NewDistTable_30_3_27, NewDistTable_5_3_2, NewDistTable_24_3_21, StopTable_5_15, NewDistTable_15_0_15, NewDistTable_31_1_30, NewDistTable_25_5_20, NewDistTable_16_1_15, NewDistTable_22_0_22, NewDistTable_15_5_10, NewDistTable_10_5_5, NewDistTable_22_1_21, NewDistTable_39_3_36, NewDistTable_19_5_14, DistStation_6, NewDistTable_15_1_14, NewDistTable_31_0_31, NewDistTable_27_1_26, NewDistTable_30_1_29, DistStation_18, NewDistTable_16_5_11, NewDistTable_27_2_25, NewDistTable_5_5_0, NewDistTable_33_4_29, NewDistTable_14_4_10, DistStation_35, DistStation_26, NewDistTable_31_5_26, NewDistTable_22_3_19, DistStation_34, NewDistTable_25_1_24, NewDistTable_6_3_3, NewDistTable_26_5_21, NewDistTable_36_0_36, NewDistTable_12_5_7, NewDistTable_24_2_22, NewDistTable_24_0_24, NewDistTable_32_4_28, NewDistTable_32_3_29, NewDistTable_30_0_30, NewDistTable_29_3_26, NewDistTable_28_3_25, DistStation_40, NewDistTable_36_3_33, DistStation_24, NewDistTable_16_3_13, DistStation_11, NewDistTable_35_3_32, DistStation_7, NewDistTable_29_5_24, NewDistTable_21_5_16, NewDistTable_40_2_38, NewDistTable_6_4_2, NewDistTable_27_0_27, StopTable_4_10, NewDistTable_10_1_9, DistStation_37, NewDistTable_15_4_11, NewDistTable_28_5_23, NewDistTable_9_5_4, NewDistTable_19_1_18, NewDistTable_36_5_31, NewDistTable_35_2_33, NewDistTable_4_1_3, DistStation_25, NewDistTable_11_3_8, NewDistTable_7_3_4, NewDistTable_4_3_1, NewDistTable_10_2_8, NewDistTable_8_3_5, NewDistTable_6_5_1, NewDistTable_6_0_6, NewDistTable_26_4_22, NewDistTable_23_1_22, NewDistTable_39_5_34, NewDistTable_7_5_2, NewDistTable_21_0_21, DistStation_33, NewDistTable_40_1_39, DistStation_29, NewDistTable_23_2_21, NewDistTable_32_0_32, DistStation_8, NewDistTable_32_1_31, NewDistTable_37_2_35, NewDistTable_20_4_16, NewDistTable_9_3_6, NewDistTable_18_5_13, DistStation_19, NewDistTable_17_5_12, NewDistTable_1_0_1, NewDistTable_28_1_27, NewDistTable_23_4_19, NewDistTable_11_4_7, NewDistTable_16_4_12, NewDistTable_11_0_11, NewDistTable_14_3_11, NewDistTable_13_3_10, NewDistTable_17_4_13, NewDistTable_10_0_10, NewDistTable_14_0_14, NewDistTable_9_0_9, NewDistTable_20_3_17, NewDistTable_7_4_3, NewDistTable_21_2_19, NewDistTable_7_1_6, NewDistTable_17_3_14, DistStation_22, NewDistTable_31_4_27, DistStation_16, NewDistTable_11_5_6, NewDistTable_17_0_17, NewDistTable_10_4_6, NewDistTable_18_1_17, NewDistTable_20_2_18, NewDistTable_5_2_3, NewDistTable_28_4_24, NewDistTable_13_1_12, NewDistTable_17_1_16, NewDistTable_9_2_7, NewDistTable_24_4_20, NewDistTable_30_4_26, DistStation_32, DistStation_15, DistStation_27, NewDistTable_27_3_24, DistStation_9, NewDistTable_12_0_12, NewDistTable_21_1_20, DistStation_31, NewDistTable_39_1_38, NewDistTable_3_1_2, NewDistTable_18_3_15, NewDistTable_31_2_29, NewDistTable_22_4_18, NewDistTable_33_3_30, NewDistTable_23_3_20, NewDistTable_12_2_10, NewDistTable_17_2_15, NewDistTable_19_4_15, NewDistTable_1_1_0, NewDistTable_13_5_8, NewDistTable_14_1_13, NewDistTable_38_5_33, NewDistTable_26_1_25, DistStation_38, NewDistTable_18_0_18, NewDistTable_14_5_9, NewDistTable_39_4_35, NewDistTable_38_4_34, NewDistTable_38_3_35, NewDistTable_34_0_34, DistStation_21, DistStation_28, DistStation_39, DistStation_36, NewDistTable_37_5_32, NewDistTable_7_0_7, DistStation_30, NewDistTable_40_4_36, NewDistTable_9_4_5, DistStation_14, NewDistTable_25_0_25, NewDistTable_39_2_37, NewDistTable_35_4_31, NewDistTable_15_2_13, NewDistTable_23_5_18, NewDistTable_26_3_23, NewDistTable_18_4_14, NewDistTable_11_2_9, NewDistTable_25_4_21, NewDistTable_40_0_40, NewDistTable_29_2_27, NewDistTable_34_3_31, NewDistTable_30_2_28, NewDistTable_5_4_1, NewDistTable_24_1_23, DistStation_10, NewDistTable_12_4_8, NewDistTable_5_1_4, NewDistTable_38_2_36, NewDistTable_16_2_14, NewDistTable_19_3_16, NewDistTable_16_0_16, NewDistTable_13_4_9, NewDistTable_37_0_37, NewDistTable_9_1_8, NewDistTable_35_0_35, StopTable_1_1, NewDistTable_36_4_32, NewDistTable_23_0_23, NewDistTable_34_2_32, NewDistTable_4_2_2, NewDistTable_29_4_25, NewDistTable_19_0_19, NewDistTable_32_2_30, NewDistTable_34_5_29, NewDistTable_12_3_9, NewDistTable_38_0_38
Jun 05, 2017 2:03:50 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 47084 expressions due to constant valuations.
Jun 05, 2017 2:03:50 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 16719 ms
Jun 05, 2017 2:03:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 337 ms
Jun 05, 2017 2:03:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 84 ms
Jun 05, 2017 2:03:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 359 ms
Jun 05, 2017 2:03:51 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 154 ms
Jun 05, 2017 2:03:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-COL-002-ReachabilityFireability-2
Jun 05, 2017 2:03:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-COL-002-ReachabilityFireability-3
Jun 05, 2017 2:03:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable BART-COL-002-ReachabilityFireability-4
Jun 05, 2017 2:03:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-COL-002-ReachabilityFireability-5
Jun 05, 2017 2:03:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable BART-COL-002-ReachabilityFireability-8
Jun 05, 2017 2:03:54 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 544 ms
Jun 05, 2017 2:03:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-COL-002-ReachabilityFireability-9
Jun 05, 2017 2:03:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable BART-COL-002-ReachabilityFireability-11
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-COL-002-ReachabilityFireability-14
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 8 / 16 in 4147 ms.
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-0(UNSAT) depth K=0 took 28 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-1(UNSAT) depth K=0 took 1 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-6(UNSAT) depth K=0 took 47 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-7(UNSAT) depth K=0 took 232 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-10(UNSAT) depth K=0 took 1 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-12(UNSAT) depth K=0 took 74 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-13(UNSAT) depth K=0 took 0 ms
Jun 05, 2017 2:03:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-15(UNSAT) depth K=0 took 101 ms
Jun 05, 2017 2:03:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-0(UNSAT) depth K=1 took 418 ms
Jun 05, 2017 2:03:56 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 402 ms
Jun 05, 2017 2:03:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-1(UNSAT) depth K=1 took 458 ms
Jun 05, 2017 2:04:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-6(UNSAT) depth K=1 took 3715 ms
Jun 05, 2017 2:04:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-7(UNSAT) depth K=1 took 2158 ms
Jun 05, 2017 2:04:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-COL-002-ReachabilityFireability-10(UNSAT) depth K=1 took 206 ms
Jun 05, 2017 2:04:04 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]
Read property : BART-COL-002-ReachabilityFireability-0 with value :(!((TrainState_1_1_1>=1)||(TrainState_2_1_1>=1)))
Read property : BART-COL-002-ReachabilityFireability-1 with value :((TrainState_1_1_1>=1)||(TrainState_2_1_1>=1))
Read property : BART-COL-002-ReachabilityFireability-2 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TrainState_1_0_0>=1)||(TrainState_2_0_0>=1))||(TrainState_1_4_0>=1))||(TrainState_2_4_0>=1))||(TrainState_1_5_0>=1))||(TrainState_2_5_0>=1))||(TrainState_1_0_1>=1))||(TrainState_2_0_1>=1))||(TrainState_1_1_1>=1))||(TrainState_2_1_1>=1))||(TrainState_1_2_1>=1))||(TrainState_2_2_1>=1))||(TrainState_1_3_1>=1))||(TrainState_2_3_1>=1))||(TrainState_1_4_1>=1))||(TrainState_2_4_1>=1))||(TrainState_1_5_1>=1))||(TrainState_2_5_1>=1))||(TrainState_1_0_2>=1))||(TrainState_2_0_2>=1))||(TrainState_1_1_2>=1))||(TrainState_2_1_2>=1))||(TrainState_1_2_2>=1))||(TrainState_2_2_2>=1))||(TrainState_1_3_2>=1))||(TrainState_2_3_2>=1))||(TrainState_1_4_2>=1))||(TrainState_2_4_2>=1))||(TrainState_1_5_2>=1))||(TrainState_2_5_2>=1))||(TrainState_1_0_3>=1))||(TrainState_2_0_3>=1))||(TrainState_1_1_3>=1))||(TrainState_2_1_3>=1))||(TrainState_1_2_3>=1))||(TrainState_2_2_3>=1))||(TrainState_1_3_3>=1))||(TrainState_2_3_3>=1))||(TrainState_1_4_3>=1))||(TrainState_2_4_3>=1))||(TrainState_1_5_3>=1))||(TrainState_2_5_3>=1))||(TrainState_1_0_4>=1))||(TrainState_2_0_4>=1))||(TrainState_1_1_4>=1))||(TrainState_2_1_4>=1))||(TrainState_1_2_4>=1))||(TrainState_2_2_4>=1))||(TrainState_1_3_4>=1))||(TrainState_2_3_4>=1))||(TrainState_1_4_4>=1))||(TrainState_2_4_4>=1))||(TrainState_1_5_4>=1))||(TrainState_2_5_4>=1))||(TrainState_1_0_5>=1))||(TrainState_2_0_5>=1))||(TrainState_1_1_5>=1))||(TrainState_2_1_5>=1))||(TrainState_1_2_5>=1))||(TrainState_2_2_5>=1))||(TrainState_1_3_5>=1))||(TrainState_2_3_5>=1))||(TrainState_1_4_5>=1))||(TrainState_2_4_5>=1))||(TrainState_1_5_5>=1))||(TrainState_2_5_5>=1))||(TrainState_1_0_6>=1))||(TrainState_2_0_6>=1))||(TrainState_1_1_6>=1))||(TrainState_2_1_6>=1))||(TrainState_1_2_6>=1))||(TrainState_2_2_6>=1))||(TrainState_1_3_6>=1))||(TrainState_2_3_6>=1))||(TrainState_1_4_6>=1))||(TrainState_2_4_6>=1))||(TrainState_1_5_6>=1))||(TrainState_2_5_6>=1))||(TrainState_1_0_7>=1))||(TrainState_2_0_7>=1))||(TrainState_1_1_7>=1))||(TrainState_2_1_7>=1))||(TrainState_1_2_7>=1))||(TrainState_2_2_7>=1))||(TrainState_1_3_7>=1))||(TrainState_2_3_7>=1))||(TrainState_1_4_7>=1))||(TrainState_2_4_7>=1))||(TrainState_1_5_7>=1))||(TrainState_2_5_7>=1))||(TrainState_1_0_8>=1))||(TrainState_2_0_8>=1))||(TrainState_1_1_8>=1))||(TrainState_2_1_8>=1))||(TrainState_1_2_8>=1))||(TrainState_2_2_8>=1))||(TrainState_1_3_8>=1))||(TrainState_2_3_8>=1))||(TrainState_1_4_8>=1))||(TrainState_2_4_8>=1))||(TrainState_1_5_8>=1))||(TrainState_2_5_8>=1))||(TrainState_1_0_9>=1))||(TrainState_2_0_9>=1))||(TrainState_1_1_9>=1))||(TrainState_2_1_9>=1))||(TrainState_1_2_9>=1))||(TrainState_2_2_9>=1))||(TrainState_1_3_9>=1))||(TrainState_2_3_9>=1))||(TrainState_1_4_9>=1))||(TrainState_2_4_9>=1))||(TrainState_1_5_9>=1))||(TrainState_2_5_9>=1))||(TrainState_1_0_10>=1))||(TrainState_2_0_10>=1))||(TrainState_1_1_10>=1))||(TrainState_2_1_10>=1))||(TrainState_1_2_10>=1))||(TrainState_2_2_10>=1))||(TrainState_1_3_10>=1))||(TrainState_2_3_10>=1))||(TrainState_1_4_10>=1))||(TrainState_2_4_10>=1))||(TrainState_1_5_10>=1))||(TrainState_2_5_10>=1))||(TrainState_1_0_11>=1))||(TrainState_2_0_11>=1))||(TrainState_1_1_11>=1))||(TrainState_2_1_11>=1))||(TrainState_1_2_11>=1))||(TrainState_2_2_11>=1))||(TrainState_1_3_11>=1))||(TrainState_2_3_11>=1))||(TrainState_1_4_11>=1))||(TrainState_2_4_11>=1))||(TrainState_1_5_11>=1))||(TrainState_2_5_11>=1))||(TrainState_1_0_12>=1))||(TrainState_2_0_12>=1))||(TrainState_1_1_12>=1))||(TrainState_2_1_12>=1))||(TrainState_1_2_12>=1))||(TrainState_2_2_12>=1))||(TrainState_1_3_12>=1))||(TrainState_2_3_12>=1))||(TrainState_1_4_12>=1))||(TrainState_2_4_12>=1))||(TrainState_1_5_12>=1))||(TrainState_2_5_12>=1))||(TrainState_1_0_13>=1))||(TrainState_2_0_13>=1))||(TrainState_1_1_13>=1))||(TrainState_2_1_13>=1))||(TrainState_1_2_13>=1))||(TrainState_2_2_13>=1))||(TrainState_1_3_13>=1))||(TrainState_2_3_13>=1))||(TrainState_1_4_13>=1))||(TrainState_2_4_13>=1))||(TrainState_1_5_13>=1))||(TrainState_2_5_13>=1))||(TrainState_1_0_14>=1))||(TrainState_2_0_14>=1))||(TrainState_1_1_14>=1))||(TrainState_2_1_14>=1))||(TrainState_1_2_14>=1))||(TrainState_2_2_14>=1))||(TrainState_1_3_14>=1))||(TrainState_2_3_14>=1))||(TrainState_1_4_14>=1))||(TrainState_2_4_14>=1))||(TrainState_1_5_14>=1))||(TrainState_2_5_14>=1))||(TrainState_1_0_15>=1))||(TrainState_2_0_15>=1))||(TrainState_1_1_15>=1))||(TrainState_2_1_15>=1))||(TrainState_1_2_15>=1))||(TrainState_2_2_15>=1))||(TrainState_1_3_15>=1))||(TrainState_2_3_15>=1))||(TrainState_1_4_15>=1))||(TrainState_2_4_15>=1))||(TrainState_1_5_15>=1))||(TrainState_2_5_15>=1))||(T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Read property : BART-COL-002-ReachabilityFireability-3 with value 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Read property : BART-COL-002-ReachabilityFireability-4 with value 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Read property : BART-COL-002-ReachabilityFireability-5 with value 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Read property : BART-COL-002-ReachabilityFireability-7 with value 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Read property : BART-COL-002-ReachabilityFireability-8 with value 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Read property : BART-COL-002-ReachabilityFireability-10 with value :((TrainState_1_1_1>=1)||(TrainState_2_1_1>=1))
Read property : BART-COL-002-ReachabilityFireability-11 with value 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Read property : BART-COL-002-ReachabilityFireability-12 with value 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Read property : BART-COL-002-ReachabilityFireability-13 with value :((TrainState_1_1_1>=1)||(TrainState_2_1_1>=1))
Read property : BART-COL-002-ReachabilityFireability-14 with value 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Read property : BART-COL-002-ReachabilityFireability-15 with value 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ate_1_4_34>=1))||(TrainState_2_4_34>=1)))
Jun 05, 2017 2:04:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-002"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-002.tgz
mv BART-PT-002 execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3253"
echo " Executing tool itstools"
echo " Input is BART-PT-002, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r170-ebro-149580922100081"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;