About the Execution of ITS-Tools for S_Peterson-COL-2
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
301.930 | 6685.00 | 12325.00 | 268.80 | F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is S_Peterson-COL-2, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r130-smll-149441682900008
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-2-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1496243303059
Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ctl command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 138 rows 108 cols
invariant : -1'ProcBool0:wantSection_0 + 1'Process0:idle_0= 0
invariant : 1'ProcBool2:wantSection_2 + 1'ProcBool3:wantSection_3= 1
invariant : 1'ProcTourProc12:beginLoop_12 + 1'ProcTourProc12:testIdentity_12 + 1'ProcTourProc12:testAlone_12 + 1'ProcTourProc12:isEndLoop_12 + 1'ProcTourProc13:beginLoop_13 + 1'ProcTourProc13:testIdentity_13 + 1'ProcTourProc13:testAlone_13 + 1'ProcTourProc13:isEndLoop_13 + 1'ProcTourProc14:beginLoop_14 + 1'ProcTourProc14:testIdentity_14 + 1'ProcTourProc14:testAlone_14 + 1'ProcTourProc14:isEndLoop_14 + 1'ProcTourProc15:beginLoop_15 + 1'ProcTourProc15:testIdentity_15 + 1'ProcTourProc15:testAlone_15 + 1'ProcTourProc15:isEndLoop_15 + 1'ProcTourProc16:beginLoop_16 + 1'ProcTourProc16:testIdentity_16 + 1'ProcTourProc16:testAlone_16 + 1'ProcTourProc16:isEndLoop_16 + 1'ProcTourProc17:beginLoop_17 + 1'ProcTourProc17:testIdentity_17 + 1'ProcTourProc17:testAlone_17 + 1'ProcTourProc17:isEndLoop_17 + 1'ProcBool4:wantSection_4 + 1'ProcTour4:askForSection_4 + 1'ProcTour4:testTurn_4 + 1'ProcTour4:endTurn_4 + 1'ProcTour5:askForSection_5 + 1'ProcTour5:testTurn_5 + 1'ProcTour5:endTurn_5 + 1'Process2:CS_2= 1
invariant : 1'ProcBool4:wantSection_4 + 1'ProcBool5:wantSection_5= 1
invariant : 1'ProcTourProc0:beginLoop_0 + 1'ProcTourProc0:testIdentity_0 + 1'ProcTourProc0:testAlone_0 + 1'ProcTourProc0:isEndLoop_0 + 1'ProcTourProc1:beginLoop_1 + 1'ProcTourProc1:testIdentity_1 + 1'ProcTourProc1:testAlone_1 + 1'ProcTourProc1:isEndLoop_1 + 1'ProcTourProc2:beginLoop_2 + 1'ProcTourProc2:testIdentity_2 + 1'ProcTourProc2:testAlone_2 + 1'ProcTourProc2:isEndLoop_2 + 1'ProcTourProc3:beginLoop_3 + 1'ProcTourProc3:testIdentity_3 + 1'ProcTourProc3:testAlone_3 + 1'ProcTourProc3:isEndLoop_3 + 1'ProcTourProc4:beginLoop_4 + 1'ProcTourProc4:testIdentity_4 + 1'ProcTourProc4:testAlone_4 + 1'ProcTourProc4:isEndLoop_4 + 1'ProcTourProc5:beginLoop_5 + 1'ProcTourProc5:testIdentity_5 + 1'ProcTourProc5:testAlone_5 + 1'ProcTourProc5:isEndLoop_5 + 1'ProcBool0:wantSection_0 + 1'ProcTour0:askForSection_0 + 1'ProcTour0:testTurn_0 + 1'ProcTour0:endTurn_0 + 1'ProcTour1:askForSection_1 + 1'ProcTour1:testTurn_1 + 1'ProcTour1:endTurn_1 + 1'Process0:CS_0= 1
invariant : 1'ProcBool0:wantSection_0 + 1'ProcBool1:wantSection_1= 1
invariant : 1'ProcTourProc6:beginLoop_6 + 1'ProcTourProc6:testIdentity_6 + 1'ProcTourProc6:testAlone_6 + 1'ProcTourProc6:isEndLoop_6 + 1'ProcTourProc7:beginLoop_7 + 1'ProcTourProc7:testIdentity_7 + 1'ProcTourProc7:testAlone_7 + 1'ProcTourProc7:isEndLoop_7 + 1'ProcTourProc8:beginLoop_8 + 1'ProcTourProc8:testIdentity_8 + 1'ProcTourProc8:testAlone_8 + 1'ProcTourProc8:isEndLoop_8 + 1'ProcTourProc9:beginLoop_9 + 1'ProcTourProc9:testIdentity_9 + 1'ProcTourProc9:testAlone_9 + 1'ProcTourProc9:isEndLoop_9 + 1'ProcTourProc10:beginLoop_10 + 1'ProcTourProc10:testIdentity_10 + 1'ProcTourProc10:testAlone_10 + 1'ProcTourProc10:isEndLoop_10 + 1'ProcTourProc11:beginLoop_11 + 1'ProcTourProc11:testIdentity_11 + 1'ProcTourProc11:testAlone_11 + 1'ProcTourProc11:isEndLoop_11 + 1'ProcBool2:wantSection_2 + 1'ProcTour2:askForSection_2 + 1'ProcTour2:testTurn_2 + 1'ProcTour2:endTurn_2 + 1'ProcTour3:askForSection_3 + 1'ProcTour3:testTurn_3 + 1'ProcTour3:endTurn_3 + 1'Process1:CS_1= 1
invariant : 1'TourProc0:turn_0 + 1'TourProc1:turn_1 + 1'TourProc2:turn_2= 1
invariant : -1'ProcBool2:wantSection_2 + 1'Process1:idle_1= 0
invariant : 1'TourProc3:turn_3 + 1'TourProc4:turn_4 + 1'TourProc5:turn_5= 1
invariant : -1'ProcBool4:wantSection_4 + 1'Process2:idle_2= 0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20754,0.210151,8672,889,19,8406,256,315,9115,24,316,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,0,0.661559,18304,1,0,30055,256,1335,38350,95,316,127184
System contains 0 deadlocks (shown below if less than --print-limit option) !
FORMULA Peterson-COL-2-ReachabilityDeadlock-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 0 ]
Exit code :0
BK_STOP 1496243309744
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
May 31, 2017 3:08:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2017 3:08:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 31, 2017 3:08:27 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 2005 ms
May 31, 2017 3:08:27 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 31, 2017 3:08:27 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 31, 2017 3:08:27 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,
May 31, 2017 3:08:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 31, 2017 3:08:28 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 31, 2017 3:08:28 PM fr.lip6.move.gal.logic.togal.ToGalTransformer toGal
WARNING: Unknown predicate type in boolean expression fr.lip6.move.gal.logic.impl.DeadlockImpl
May 31, 2017 3:08:28 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 10 instantiations of transitions. Total transitions/syncs built is 142
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Peterson-COL-2-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 3 uncalled transitions from type Peterson_COL_2
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 222 ms
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays idle, wantSection, askForSection, turn, testTurn, beginLoop, endTurn, CS, testIdentity, testAlone, isEndLoop to variables to allow decomposition.
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 90 redundant transitions.
May 31, 2017 3:08:28 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Peterson-COL-2-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
May 31, 2017 3:08:28 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 22 ms
May 31, 2017 3:08:29 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 55 ms
May 31, 2017 3:08:29 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
built 103 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions updateTurn_0_0_0, updateTurn_0_0_1, updateTurn_0_1_0, updateTurn_0_1_1, updateTurn_0_2_0, updateTurn_0_2_1, updateTurn_1_0_0, updateTurn_1_0_1, updateTurn_1_1_0, updateTurn_1_1_1, updateTurn_1_2_0, updateTurn_1_2_1, updateTurn_2_0_0, updateTurn_2_0_1, updateTurn_2_1_0, updateTurn_2_1_1, updateTurn_2_2_0, updateTurn_2_2_1, becomeIdle_0, becomeIdle_1, becomeIdle_2, notAlone_0_2_0, notAlone_0_2_1, notAlone_1_2_0, notAlone_1_2_1, notAlone_2_1_0, notAlone_2_1_1, endLoop_0_0, endLoop_1_0, endLoop_2_0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :12/94/30/136
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_Peterson-COL-2"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/S_Peterson-COL-2.tgz
mv S_Peterson-COL-2 execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is S_Peterson-COL-2, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r130-smll-149441682900008"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;