Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is S_PermAdmissibility-PT-01, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r120-blw7-149441652100401
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-0
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-1
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-10
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-11
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-12
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-13
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-14
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-15
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-2
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-3
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-4
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-5
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-6
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-7
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-8
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-9

=== Now, execution of the tool begins

BK_START 1496471392523


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ltl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(("(((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=c20")U(X("(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=c5")))))
Formula 0 simplified : !G("(((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=c20" U X"(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=c5")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant : -1'aux8_7 + 1'c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'c110 + 2'c9= 0
invariant : 2'c20 + 2'out7_1 + 2'out7_0 + 2'out7_3 + 2'out7_2 + 2'out7_5 + 2'out7_4 + 2'out7_7 + 2'out7_6 + 2'c19 + 1'aux13_2 + 1'aux13_1 + 1'aux13_0 + 1'aux13_7 + 1'c18 + 1'aux13_3 + 1'aux13_4 + 1'aux13_5 + 1'aux13_6 + 1'aux6_0 + 1'c12 + 1'aux6_5 + 1'aux6_1 + 1'aux6_4 + 2'c13 + 1'in3_5 + 1'in3_4 + 1'c6= 2
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + 1'out3_0 + 1'out3_1 + 1'out3_6 + 1'out3_7 + 1'out3_2 + 1'out3_3 + 1'out3_4 + 1'out3_5= 0
invariant : -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out8_1 + 1'out8_0 + 1'out8_3 + 1'out8_2 + 1'out8_6 + 1'out8_7 + 1'out8_4 + 1'out8_5= 0
invariant : 1'aux14_0 + 1'aux14_1 + 1'aux14_2 + 1'aux14_3 + 1'aux14_4 + 1'aux14_6 + 1'aux14_5 + -1'c20 + 1'aux14_7 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + 2'c14= 0
invariant : -2'c20 + -2'out7_1 + -2'out7_0 + -2'out7_3 + -2'out7_2 + -2'out7_5 + -2'out7_4 + -2'out7_7 + -2'out7_6 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux6_0 + -1'c12 + -1'aux6_5 + -1'aux6_1 + -1'aux6_4 + -2'c13 + -2'in3_5 + -2'in3_4 + 2'c5= -2
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + 1'out4_0 + 1'out4_1 + 1'out4_7 + 1'out4_6 + 1'out4_3 + 1'out4_2 + 1'out4_5 + 1'out4_4= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_4 + 1'aux16_5 + -1'c20 + -1'out7_3 + -1'out7_2 + -1'out7_7 + -1'out7_6 + 1'out5_1 + -1'c19 + 1'out5_0 + 1'out5_5 + 1'out5_4 + 1'aux15_1 + 1'aux15_0 + 1'aux15_5 + 1'aux15_4 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out3_7 + -1'out3_2 + -1'out3_3 + 1'out1_0 + 1'out1_5 + 1'out1_1 + 1'out1_4 + -1'c12 + 1'aux12_5 + 1'aux12_4 + 1'aux12_1 + 1'aux12_0 + -2'c13 + -1'c11 + 1'aux10_0 + 1'aux10_1 + 1'aux10_4 + 1'aux10_5= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_2 + 1'aux16_3 + 1'aux16_4 + 1'aux16_5 + 1'aux16_6 + 1'aux16_7 + -1'c20 + -2'c19 + -1'aux15_2 + -1'aux15_1 + -1'aux15_0 + -1'aux15_6 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + -1'aux15_7 + -1'c18 + 2'c16= 0
invariant : -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_6 + -1'aux14_5 + 1'c20 + -1'aux14_7 + 2'c19 + 1'aux15_2 + 1'aux15_1 + 1'aux15_0 + 1'aux15_6 + 1'aux15_5 + 1'aux15_4 + 1'aux15_3 + 1'aux15_7 + 1'c18 + 2'c15= 0
invariant : 1'aux8_7 + -1'c12 + 1'aux8_3 + 1'aux8_6 + 1'aux8_2 + -2'c11 + -1'aux7_7 + -1'aux7_6 + -1'c110 + -1'aux7_3 + -1'aux7_2 + 2'c8= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out5_1 + 1'out5_2 + 1'out5_0 + 1'out5_5 + 1'out5_6 + 1'out5_3 + 1'out5_4 + 1'out5_7= 0
invariant : -1'aux16_0 + -1'aux16_1 + 1'aux16_2 + 1'aux16_3 + -1'aux16_4 + -1'aux16_5 + 1'aux16_6 + 1'aux16_7 + 1'c20 + 2'out7_3 + 2'out7_2 + 2'out7_7 + 2'out7_6 + -2'out5_1 + -2'out5_0 + -2'out5_5 + -2'out5_4 + 1'aux15_2 + -1'aux15_1 + -1'aux15_0 + 1'aux15_6 + -1'aux15_5 + -1'aux15_4 + 1'aux15_3 + 1'aux15_7 + 1'c18 + 2'out3_6 + 2'out3_7 + 2'out3_2 + 2'out3_3 + -2'out1_0 + -2'out1_5 + -2'out1_1 + -2'out1_4 + -2'c12 + -2'aux12_5 + -2'aux12_4 + -2'aux12_1 + -2'aux12_0 + -2'c11 + 2'aux10_2 + 2'aux10_3 + 2'aux10_6 + 2'aux10_7= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_2 + 1'aux16_3 + 1'aux16_4 + 1'aux16_5 + 1'aux16_6 + 1'aux16_7 + -1'c20 + -2'c19 + 1'aux15_2 + 1'aux15_1 + 1'aux15_0 + 1'aux15_6 + 1'aux15_5 + 1'aux15_4 + 1'aux15_3 + -2'aux13_2 + -2'aux13_1 + -2'aux13_0 + 1'aux15_7 + -2'aux13_7 + -1'c18 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + 2'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + 2'aux12_1 + 2'aux12_0 + -4'c13 + 2'aux12_7= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out6_1 + 1'out6_2 + 1'out6_0 + 1'out6_6 + 1'out6_5 + 1'out6_4 + 1'out6_3 + 1'out6_7= 0
invariant : -1'in3_5 + -1'in3_4 + 1'in1_1 + 1'in1_0= 0
invariant : -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + 1'c20 + 2'c19 + 2'c18 + 2'c17= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + -1'c18 + 1'out2_0 + 1'out2_7 + 1'out2_5 + 1'out2_6 + 1'out2_3 + 1'out2_4 + 1'out2_1 + 1'out2_2= 0
invariant : = 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + -1'c18 + 1'out1_0 + 1'out1_6 + 1'out1_5 + 1'out1_7 + 1'out1_2 + 1'out1_1 + 1'out1_4 + 1'out1_3= 0
invariant : 1'aux14_0 + 1'aux14_1 + 1'aux14_2 + 1'aux14_3 + 1'aux14_4 + 1'aux14_6 + 1'aux14_5 + -1'c20 + 1'aux14_7 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -4'c12 + -4'c13 + 2'aux11_5 + 2'aux11_4 + 2'aux11_3 + 2'aux11_2 + 2'aux11_1 + 2'aux11_0 + 2'aux11_7 + 2'aux11_6= 0
28 unique states visited
12 strongly connected components in search stack
30 transitions explored
18 items max in DFS search stack
7802 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,78.1034,1813664,1,0,1178,3.663e+06,1152,561,18722,1.08078e+06,1309
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F(X("(((aux5_1+aux5_0)+aux5_5)+aux5_4)>=1")))))
Formula 1 simplified : !FX"(((aux5_1+aux5_0)+aux5_5)+aux5_4)>=1"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
3 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,78.1262,1814700,1,0,1179,3.663e+06,1161,562,18729,1.0808e+06,1316
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((G((X("c6<=c110"))U(X("c9>=2")))))
Formula 2 simplified : !G(X"c6<=c110" U X"c9>=2")
19 unique states visited
18 strongly connected components in search stack
21 transitions explored
18 items max in DFS search stack
5 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,78.176,1816564,1,0,1179,3.663e+06,1171,562,18737,1.0808e+06,1321
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-2 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(G(("c6<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)")U("c5<=c12")))))
Formula 3 simplified : !XG("c6<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)" U "c5<=c12")
17 unique states visited
0 strongly connected components in search stack
17 transitions explored
17 items max in DFS search stack
1549 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,93.6702,1893204,1,0,1206,3.66478e+06,1187,606,18799,1.14824e+06,1508
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-3 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((G(F(("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2)")U("(((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)<=c11")))))
Formula 4 simplified : !GF("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2)" U "(((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)<=c11")
23 unique states visited
0 strongly connected components in search stack
29 transitions explored
17 items max in DFS search stack
11 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,93.7859,1893240,1,0,1218,3.66517e+06,1196,617,18828,1.14919e+06,1584
no accepting run found
Formula 4 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F(G(G(F("(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)"))))))
Formula 5 simplified : !FGF"(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)"
19 unique states visited
0 strongly connected components in search stack
32 transitions explored
17 items max in DFS search stack
14 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,93.9237,1893300,1,0,1222,3.66612e+06,1205,620,18874,1.16008e+06,1632
no accepting run found
Formula 5 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-5 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F((X("c110>=2"))U(G("(((aux6_0+aux6_5)+aux6_1)+aux6_4)>=2")))))
Formula 6 simplified : !F(X"c110>=2" U G"(((aux6_0+aux6_5)+aux6_1)+aux6_4)>=2")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
43 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,94.3558,1893360,1,0,1269,3.66996e+06,1218,680,18892,1.1698e+06,1847
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-6 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("c110>=3"))
Formula 7 simplified : !"c110>=3"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,94.3589,1893364,1,0,1269,3.67002e+06,1221,680,18894,1.16984e+06,1852
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-7 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !(((F(G("(in1_1+in1_0)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)")))U(F(G("(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=(((aux5_1+aux5_0)+aux5_5)+aux5_4)")))))
Formula 8 simplified : !(FG"(in1_1+in1_0)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)" U FG"(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=(((aux5_1+aux5_0)+aux5_5)+aux5_4)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
50 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,94.8544,1893752,1,0,1297,3.6718e+06,1234,740,18982,1.17754e+06,2050
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !(((("(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)")U("(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)"))U(("c5<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)")U("c14>=3"))))
Formula 9 simplified : !(("(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)" U "(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)") U ("c5<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)" U "c14>=3"))
17 unique states visited
17 strongly connected components in search stack
17 transitions explored
17 items max in DFS search stack
74 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,95.6063,1894616,1,0,1297,3.67376e+06,1269,740,19197,1.17983e+06,2232
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !((G(("(((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7)>=1")U(F("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2")))))
Formula 10 simplified : !G("(((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7)>=1" U F"(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2")
19 unique states visited
19 strongly connected components in search stack
20 transitions explored
19 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,95.6675,1894656,1,0,1297,3.67668e+06,1278,740,19217,1.18157e+06,2270
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !(("(((aux6_0+aux6_5)+aux6_1)+aux6_4)<=(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)"))
Formula 11 simplified : !"(((aux6_0+aux6_5)+aux6_1)+aux6_4)<=(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,95.6691,1894656,1,0,1297,3.67668e+06,1281,740,19230,1.18157e+06,2272
no accepting run found
Formula 11 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((X(("c17<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)")U(G("(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)>=1")))))
Formula 12 simplified : !X("c17<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)" U G"(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)>=1")
17 unique states visited
0 strongly connected components in search stack
29 transitions explored
15 items max in DFS search stack
33 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,96.006,1894700,1,0,1334,3.67811e+06,1302,820,19390,1.2029e+06,2644
no accepting run found
Formula 12 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(((X(G("(in2_2+in2_3)<=c7")))U(F(X("(in2_2+in2_3)>=2")))))
Formula 13 simplified : !(XG"(in2_2+in2_3)<=c7" U FX"(in2_2+in2_3)>=2")
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,96.0074,1894724,1,0,1334,3.67811e+06,1311,820,19393,1.2029e+06,2648
no accepting run found
Formula 13 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((X(F(F("c9<=c12")))))
Formula 14 simplified : !XF"c9<=c12"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,96.0083,1894724,1,0,1334,3.67811e+06,1320,820,19397,1.2029e+06,2652
no accepting run found
Formula 14 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !((G(X(G(G("(((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1"))))))
Formula 15 simplified : !GXG"(((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,96.0136,1894728,1,0,1334,3.67817e+06,1326,820,19412,1.20293e+06,2660
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Exit code :0

BK_STOP 1496471495578

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination LTLCardinality -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 03, 2017 6:29:53 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2017 6:29:54 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 122 ms
Jun 03, 2017 6:29:54 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
Jun 03, 2017 6:29:54 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
Jun 03, 2017 6:29:54 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 229 ms
Jun 03, 2017 6:29:54 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 31 ms
Jun 03, 2017 6:29:54 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Jun 03, 2017 6:29:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 21 place invariants in 218 ms
Jun 03, 2017 6:30:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 8811 ms
Jun 03, 2017 6:30:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 592 transitions.
Jun 03, 2017 6:30:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/592 took 55 ms. Total solver calls (SAT/UNSAT): 136(8/128)
Jun 03, 2017 6:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :16/592 took 1093 ms. Total solver calls (SAT/UNSAT): 2312(136/2176)
Jun 03, 2017 6:30:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :31/592 took 2101 ms. Total solver calls (SAT/UNSAT): 4352(256/4096)
Jun 03, 2017 6:30:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :46/592 took 3128 ms. Total solver calls (SAT/UNSAT): 6392(376/6016)
Jun 03, 2017 6:30:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :59/592 took 4180 ms. Total solver calls (SAT/UNSAT): 8175(536/7639)
Jun 03, 2017 6:30:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :63/592 took 5215 ms. Total solver calls (SAT/UNSAT): 8779(792/7987)
Jun 03, 2017 6:30:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :67/592 took 6246 ms. Total solver calls (SAT/UNSAT): 9383(1048/8335)
Jun 03, 2017 6:30:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :72/592 took 7503 ms. Total solver calls (SAT/UNSAT): 10138(1368/8770)
Jun 03, 2017 6:30:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :76/592 took 8515 ms. Total solver calls (SAT/UNSAT): 10742(1624/9118)
Jun 03, 2017 6:30:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :82/592 took 9635 ms. Total solver calls (SAT/UNSAT): 11648(2008/9640)
Jun 03, 2017 6:30:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :88/592 took 10782 ms. Total solver calls (SAT/UNSAT): 12554(2392/10162)
Jun 03, 2017 6:30:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :94/592 took 11902 ms. Total solver calls (SAT/UNSAT): 13460(2776/10684)
Jun 03, 2017 6:30:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :100/592 took 13001 ms. Total solver calls (SAT/UNSAT): 14366(3160/11206)
Jun 03, 2017 6:30:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :110/592 took 14152 ms. Total solver calls (SAT/UNSAT): 15801(3520/12281)
Jun 03, 2017 6:30:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :116/592 took 15269 ms. Total solver calls (SAT/UNSAT): 16707(3904/12803)
Jun 03, 2017 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :122/592 took 16370 ms. Total solver calls (SAT/UNSAT): 17613(4288/13325)
Jun 03, 2017 6:30:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :147/592 took 17402 ms. Total solver calls (SAT/UNSAT): 21013(4488/16525)
Jun 03, 2017 6:30:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :158/592 took 18447 ms. Total solver calls (SAT/UNSAT): 22569(4800/17769)
Jun 03, 2017 6:30:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :178/592 took 19456 ms. Total solver calls (SAT/UNSAT): 25304(5016/20288)
Jun 03, 2017 6:30:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :191/592 took 20591 ms. Total solver calls (SAT/UNSAT): 26907(5400/21507)
Jun 03, 2017 6:30:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :197/592 took 21601 ms. Total solver calls (SAT/UNSAT): 27525(5784/21741)
Jun 03, 2017 6:30:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :204/592 took 22760 ms. Total solver calls (SAT/UNSAT): 28246(6232/22014)
Jun 03, 2017 6:30:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :211/592 took 23913 ms. Total solver calls (SAT/UNSAT): 28967(6680/22287)
Jun 03, 2017 6:30:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :218/592 took 25069 ms. Total solver calls (SAT/UNSAT): 29688(7128/22560)
Jun 03, 2017 6:30:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :228/592 took 26099 ms. Total solver calls (SAT/UNSAT): 30883(7488/23395)
Jun 03, 2017 6:30:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :234/592 took 27134 ms. Total solver calls (SAT/UNSAT): 31501(7872/23629)
Jun 03, 2017 6:30:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :241/592 took 28292 ms. Total solver calls (SAT/UNSAT): 32222(8320/23902)
Jun 03, 2017 6:30:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :248/592 took 29437 ms. Total solver calls (SAT/UNSAT): 32943(8768/24175)
Jun 03, 2017 6:30:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :261/592 took 30453 ms. Total solver calls (SAT/UNSAT): 33467(9133/24334)
Jun 03, 2017 6:30:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :282/592 took 31606 ms. Total solver calls (SAT/UNSAT): 34141(9545/24596)
Jun 03, 2017 6:30:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :294/592 took 32683 ms. Total solver calls (SAT/UNSAT): 34650(9788/24862)
Jun 03, 2017 6:30:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :307/592 took 33735 ms. Total solver calls (SAT/UNSAT): 35118(10087/25031)
Jun 03, 2017 6:30:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :318/592 took 34867 ms. Total solver calls (SAT/UNSAT): 36037(10504/25533)
Jun 03, 2017 6:30:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :329/592 took 35979 ms. Total solver calls (SAT/UNSAT): 37255(10928/26327)
Jun 03, 2017 6:30:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :347/592 took 37011 ms. Total solver calls (SAT/UNSAT): 38212(11244/26968)
Jun 03, 2017 6:30:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :354/592 took 38107 ms. Total solver calls (SAT/UNSAT): 39423(11692/27731)
Jun 03, 2017 6:30:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :361/592 took 39203 ms. Total solver calls (SAT/UNSAT): 40634(12140/28494)
Jun 03, 2017 6:30:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :368/592 took 40300 ms. Total solver calls (SAT/UNSAT): 41845(12588/29257)
Jun 03, 2017 6:30:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :375/592 took 41397 ms. Total solver calls (SAT/UNSAT): 43056(13036/30020)
Jun 03, 2017 6:30:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :384/592 took 42414 ms. Total solver calls (SAT/UNSAT): 44568(13423/31145)
Jun 03, 2017 6:30:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :397/592 took 43425 ms. Total solver calls (SAT/UNSAT): 46697(13751/32946)
Jun 03, 2017 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :404/592 took 44513 ms. Total solver calls (SAT/UNSAT): 47908(14199/33709)
Jun 03, 2017 6:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :413/592 took 45520 ms. Total solver calls (SAT/UNSAT): 49420(14586/34834)
Jun 03, 2017 6:30:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :449/592 took 46679 ms. Total solver calls (SAT/UNSAT): 55138(14748/40390)
Jun 03, 2017 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :456/592 took 47801 ms. Total solver calls (SAT/UNSAT): 56349(15196/41153)
Jun 03, 2017 6:30:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :476/592 took 48855 ms. Total solver calls (SAT/UNSAT): 59569(15468/44101)
Jun 03, 2017 6:30:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :483/592 took 49998 ms. Total solver calls (SAT/UNSAT): 60780(15916/44864)
Jun 03, 2017 6:30:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :490/592 took 51139 ms. Total solver calls (SAT/UNSAT): 61991(16364/45627)
Jun 03, 2017 6:30:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :497/592 took 52252 ms. Total solver calls (SAT/UNSAT): 63202(16812/46390)
Jun 03, 2017 6:30:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :504/592 took 53376 ms. Total solver calls (SAT/UNSAT): 64413(17260/47153)
Jun 03, 2017 6:30:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :511/592 took 54489 ms. Total solver calls (SAT/UNSAT): 65624(17708/47916)
Jun 03, 2017 6:30:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :518/592 took 55602 ms. Total solver calls (SAT/UNSAT): 66835(18156/48679)
Jun 03, 2017 6:31:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :534/592 took 56642 ms. Total solver calls (SAT/UNSAT): 69438(18487/50951)
Jun 03, 2017 6:31:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :555/592 took 57660 ms. Total solver calls (SAT/UNSAT): 72816(18760/54056)
Jun 03, 2017 6:31:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 58470 ms. Total solver calls (SAT/UNSAT): 78504(18796/59708)
Jun 03, 2017 6:31:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 592 transitions.
Jun 03, 2017 6:31:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :3/592 took 1054 ms. Total solver calls (SAT/UNSAT): 544(272/272)
Jun 03, 2017 6:31:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :7/592 took 2095 ms. Total solver calls (SAT/UNSAT): 1088(544/544)
Jun 03, 2017 6:31:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :11/592 took 3158 ms. Total solver calls (SAT/UNSAT): 1632(816/816)
Jun 03, 2017 6:31:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :15/592 took 4199 ms. Total solver calls (SAT/UNSAT): 2176(1088/1088)
Jun 03, 2017 6:31:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :19/592 took 5244 ms. Total solver calls (SAT/UNSAT): 2720(1360/1360)
Jun 03, 2017 6:31:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :23/592 took 6287 ms. Total solver calls (SAT/UNSAT): 3264(1632/1632)
Jun 03, 2017 6:31:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :27/592 took 7337 ms. Total solver calls (SAT/UNSAT): 3808(1904/1904)
Jun 03, 2017 6:31:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :31/592 took 8387 ms. Total solver calls (SAT/UNSAT): 4352(2176/2176)
Jun 03, 2017 6:31:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :35/592 took 9442 ms. Total solver calls (SAT/UNSAT): 4896(2448/2448)
Jun 03, 2017 6:31:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :39/592 took 10489 ms. Total solver calls (SAT/UNSAT): 5440(2720/2720)
Jun 03, 2017 6:31:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :43/592 took 11536 ms. Total solver calls (SAT/UNSAT): 5984(2992/2992)
Jun 03, 2017 6:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :47/592 took 12592 ms. Total solver calls (SAT/UNSAT): 6528(3264/3264)
Jun 03, 2017 6:31:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :51/592 took 13641 ms. Total solver calls (SAT/UNSAT): 7072(3536/3536)
Jun 03, 2017 6:31:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :55/592 took 14683 ms. Total solver calls (SAT/UNSAT): 7616(3808/3808)
Jun 03, 2017 6:31:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :59/592 took 15708 ms. Total solver calls (SAT/UNSAT): 8175(4080/4095)
Jun 03, 2017 6:31:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :64/592 took 16943 ms. Total solver calls (SAT/UNSAT): 8930(4420/4510)
Jun 03, 2017 6:31:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :69/592 took 18169 ms. Total solver calls (SAT/UNSAT): 9685(4760/4925)
Jun 03, 2017 6:31:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :73/592 took 19223 ms. Total solver calls (SAT/UNSAT): 10289(5032/5257)
Jun 03, 2017 6:31:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :77/592 took 20260 ms. Total solver calls (SAT/UNSAT): 10893(5304/5589)
Jun 03, 2017 6:31:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :81/592 took 21321 ms. Total solver calls (SAT/UNSAT): 11497(5576/5921)
Jun 03, 2017 6:31:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :86/592 took 22581 ms. Total solver calls (SAT/UNSAT): 12252(5916/6336)
Jun 03, 2017 6:31:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :91/592 took 23758 ms. Total solver calls (SAT/UNSAT): 13007(6256/6751)
Jun 03, 2017 6:31:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :96/592 took 24951 ms. Total solver calls (SAT/UNSAT): 13762(6596/7166)
Jun 03, 2017 6:31:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :101/592 took 26155 ms. Total solver calls (SAT/UNSAT): 14502(6936/7566)
Jun 03, 2017 6:31:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :105/592 took 27182 ms. Total solver calls (SAT/UNSAT): 15061(7208/7853)
Jun 03, 2017 6:31:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :109/592 took 28249 ms. Total solver calls (SAT/UNSAT): 15650(7480/8170)
Jun 03, 2017 6:31:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :113/592 took 29296 ms. Total solver calls (SAT/UNSAT): 16254(7752/8502)
Jun 03, 2017 6:31:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :117/592 took 30351 ms. Total solver calls (SAT/UNSAT): 16858(8024/8834)
Jun 03, 2017 6:31:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :122/592 took 31616 ms. Total solver calls (SAT/UNSAT): 17613(8364/9249)
Jun 03, 2017 6:31:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :126/592 took 32705 ms. Total solver calls (SAT/UNSAT): 18157(8636/9521)
Jun 03, 2017 6:31:35 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions switch9_2_0, switch9_3_0, switch9_4_0, switch9_3_5, switch9_1_5, switch9_2_5, switch9_7_4, switch9_0_5, switch9_6_4, switch9_3_6, switch9_4_6, switch9_1_6, switch9_2_6, switch9_7_5, switch9_0_6, switch9_6_5, switch9_4_7, switch9_3_7, switch9_2_7, switch9_1_7, switch9_0_7, switch9_5_6, switch10_4_0, switch10_3_0, switch10_2_0, switch9_5_7, switch9_2_1, switch9_3_1, switch9_4_1, switch9_5_0, switch9_6_0, switch9_7_0, switch9_1_2, switch9_4_2, switch9_5_1, switch9_6_1, switch9_7_1, switch9_0_2, switch9_1_3, switch9_4_3, switch9_6_2, switch9_5_2, switch9_0_3, switch9_7_2, switch9_2_4, switch9_1_4, switch9_3_4, switch9_6_3, switch9_5_3, switch9_0_4, switch9_7_3, switch10_7_4, switch10_0_5, switch10_6_4, switch10_3_5, switch10_1_5, switch10_2_5, switch10_7_5, switch10_0_6, switch10_6_5, switch10_3_6, switch10_4_6, switch10_1_6, switch10_2_6, switch10_0_7, switch10_5_6, switch10_4_7, switch10_3_7, switch10_2_7, switch10_1_7, switch10_5_7, switch11_4_0, switch11_3_0, switch11_2_0, switch10_5_0, switch10_6_0, switch10_7_0, switch10_2_1, switch10_3_1, switch10_4_1, switch10_5_1, switch10_6_1, switch10_7_1, switch10_0_2, switch10_1_2, switch10_4_2, switch10_6_2, switch10_5_2, switch10_0_3, switch10_7_2, switch10_1_3, switch10_4_3, switch10_6_3, switch10_5_3, switch10_0_4, switch10_7_3, switch10_2_4, switch10_1_4, switch10_3_4, switch11_4_6, switch11_3_6, switch11_2_6, switch11_1_6, switch11_0_6, switch11_7_5, switch11_6_5, switch11_3_5, switch11_2_5, switch11_1_5, switch11_0_5, switch11_7_4, switch11_6_4, switch11_5_7, switch11_3_7, switch11_4_7, switch11_1_7, switch11_2_7, switch11_0_7, switch11_5_6, switch11_1_2, switch11_4_2, switch11_6_1, switch11_5_1, switch11_0_2, switch11_7_1, switch11_2_1, switch11_4_1, switch11_3_1, switch11_6_0, switch11_5_0, switch11_7_0, switch11_1_4, switch11_2_4, switch11_3_4, switch11_5_3, switch11_6_3, switch11_7_3, switch11_0_4, switch11_1_3, switch11_4_3, switch11_5_2, switch11_6_2, switch11_7_2, switch11_0_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :64/384/144/592
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_PermAdmissibility-PT-01"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_PermAdmissibility-PT-01.tgz
mv S_PermAdmissibility-PT-01 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is S_PermAdmissibility-PT-01, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r120-blw7-149441652100401"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;