Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is S_BridgeAndVehicles-COL-V20P20N10, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r090-csrt-149441076600305
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1496391787500


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ctl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 548 rows 68 cols
invariant : 1'sens0:CONTROLEUR_0 + 1'sens0:CHOIX_0 + 1'sens0:VIDANGE_0 + 1'sens1:CONTROLEUR_1 + 1'sens1:CHOIX_1 + 1'sens1:VIDANGE_1= 1
invariant : -1'CAPACITE:CAPACITE[0] + 1'SORTI_A:SORTI_A[0] + 1'ROUTE_A:ROUTE_A[0] + 1'ATTENTE_A:ATTENTE_A[0] + 1'ATTENTE_B:ATTENTE_B[0] + 1'ROUTE_B:ROUTE_B[0] + 1'SORTI_B:SORTI_B[0]= 20
invariant : 1'CAPACITE:CAPACITE[0] + -1'SORTI_A:SORTI_A[0] + -1'ROUTE_A:ROUTE_A[0] + -1'ATTENTE_A:ATTENTE_A[0] + 1'SUR_PONT_B:SUR_PONT_B[0]= 0
invariant : 1'SORTI_A:SORTI_A[0] + 1'ROUTE_A:ROUTE_A[0] + 1'ATTENTE_A:ATTENTE_A[0] + 1'SUR_PONT_A:SUR_PONT_A[0]= 20
invariant : 1'compteur0:COMPTEUR_0 + 1'compteur1:COMPTEUR_1 + 1'compteur2:COMPTEUR_2 + 1'compteur3:COMPTEUR_3 + 1'compteur4:COMPTEUR_4 + 1'compteur5:COMPTEUR_5 + 1'compteur6:COMPTEUR_6 + 1'compteur7:COMPTEUR_7 + 1'compteur8:COMPTEUR_8 + 1'compteur9:COMPTEUR_9 + 1'compteur10:COMPTEUR_10= 1
invariant : 1'voitureA0:NB_ATTENTE_A_0 + 1'voitureA1:NB_ATTENTE_A_1 + 1'voitureA2:NB_ATTENTE_A_2 + 1'voitureA3:NB_ATTENTE_A_3 + 1'voitureA4:NB_ATTENTE_A_4 + 1'voitureA5:NB_ATTENTE_A_5 + 1'voitureA6:NB_ATTENTE_A_6 + 1'voitureA7:NB_ATTENTE_A_7 + 1'voitureA8:NB_ATTENTE_A_8 + 1'voitureA9:NB_ATTENTE_A_9 + 1'voitureA10:NB_ATTENTE_A_10 + 1'voitureA11:NB_ATTENTE_A_11 + 1'voitureA12:NB_ATTENTE_A_12 + 1'voitureA13:NB_ATTENTE_A_13 + 1'voitureA14:NB_ATTENTE_A_14 + 1'voitureA15:NB_ATTENTE_A_15 + 1'voitureA16:NB_ATTENTE_A_16 + 1'voitureA17:NB_ATTENTE_A_17 + 1'voitureA18:NB_ATTENTE_A_18 + 1'voitureA19:NB_ATTENTE_A_19 + 1'voitureA20:NB_ATTENTE_A_20= 1
invariant : 1'voitureB0:NB_ATTENTE_B_0 + 1'voitureB1:NB_ATTENTE_B_1 + 1'voitureB2:NB_ATTENTE_B_2 + 1'voitureB3:NB_ATTENTE_B_3 + 1'voitureB4:NB_ATTENTE_B_4 + 1'voitureB5:NB_ATTENTE_B_5 + 1'voitureB6:NB_ATTENTE_B_6 + 1'voitureB7:NB_ATTENTE_B_7 + 1'voitureB8:NB_ATTENTE_B_8 + 1'voitureB9:NB_ATTENTE_B_9 + 1'voitureB10:NB_ATTENTE_B_10 + 1'voitureB11:NB_ATTENTE_B_11 + 1'voitureB12:NB_ATTENTE_B_12 + 1'voitureB13:NB_ATTENTE_B_13 + 1'voitureB14:NB_ATTENTE_B_14 + 1'voitureB15:NB_ATTENTE_B_15 + 1'voitureB16:NB_ATTENTE_B_16 + 1'voitureB17:NB_ATTENTE_B_17 + 1'voitureB18:NB_ATTENTE_B_18 + 1'voitureB19:NB_ATTENTE_B_19 + 1'voitureB20:NB_ATTENTE_B_20= 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,6.73257e+06,19.379,600496,93659,30,1.34894e+06,242,316,1.40732e+06,17,443,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,20,34.4242,636984,87,8,1.34894e+06,1031,1262,1.96825e+06,91,3296,5553424

System contains 20 deadlocks (shown below if less than --print-limit option) !
FORMULA BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Exit code :0
[ 20 states ]

BK_STOP 1496391825937

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 02, 2017 8:23:09 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2017 8:23:09 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1314 ms
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.logic.togal.ToGalTransformer toGal
WARNING: Unknown predicate type in boolean expression fr.lip6.move.gal.logic.impl.DeadlockImpl
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 59 instantiations of transitions. Total transitions/syncs built is 178
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 68 ms
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays NB_ATTENTE_A, NB_ATTENTE_B, CONTROLEUR, CHOIX, COMPTEUR, VIDANGE to variables to allow decomposition.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 125 redundant transitions.
Jun 02, 2017 8:23:10 AM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
Jun 02, 2017 8:23:10 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 11 ms
Jun 02, 2017 8:23:11 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 54 ms
Jun 02, 2017 8:23:11 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 68 variables to be positive in 626 ms
Jun 02, 2017 8:23:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 548 transitions.
Jun 02, 2017 8:23:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/548 took 56 ms. Total solver calls (SAT/UNSAT): 293(2/291)
Jun 02, 2017 8:23:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :23/548 took 1074 ms. Total solver calls (SAT/UNSAT): 6969(52/6917)
Jun 02, 2017 8:23:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :52/548 took 2081 ms. Total solver calls (SAT/UNSAT): 15569(139/15430)
Jun 02, 2017 8:23:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :82/548 took 3094 ms. Total solver calls (SAT/UNSAT): 24274(229/24045)
Jun 02, 2017 8:23:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :117/548 took 4138 ms. Total solver calls (SAT/UNSAT): 34550(334/34216)
Jun 02, 2017 8:23:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :151/548 took 5183 ms. Total solver calls (SAT/UNSAT): 44729(436/44293)
Jun 02, 2017 8:23:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :185/548 took 6198 ms. Total solver calls (SAT/UNSAT): 54728(538/54190)
Jun 02, 2017 8:23:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :219/548 took 7205 ms. Total solver calls (SAT/UNSAT): 64726(640/64086)
Jun 02, 2017 8:23:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :254/548 took 8232 ms. Total solver calls (SAT/UNSAT): 74991(745/74246)
Jun 02, 2017 8:23:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :288/548 took 9241 ms. Total solver calls (SAT/UNSAT): 84989(847/84142)
Jun 02, 2017 8:23:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :323/548 took 10254 ms. Total solver calls (SAT/UNSAT): 95265(952/94313)
Jun 02, 2017 8:23:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :359/548 took 11274 ms. Total solver calls (SAT/UNSAT): 105819(1060/104759)
Jun 02, 2017 8:23:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :394/548 took 12294 ms. Total solver calls (SAT/UNSAT): 116277(1165/115112)
Jun 02, 2017 8:23:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :429/548 took 13299 ms. Total solver calls (SAT/UNSAT): 126553(1270/125283)
Jun 02, 2017 8:23:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :471/548 took 14309 ms. Total solver calls (SAT/UNSAT): 136686(1372/135314)
Jun 02, 2017 8:23:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 15259 ms. Total solver calls (SAT/UNSAT): 145178(1508/143670)
Jun 02, 2017 8:23:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 548 transitions.
Jun 02, 2017 8:23:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :12/548 took 1076 ms. Total solver calls (SAT/UNSAT): 3809(169/3640)
Jun 02, 2017 8:23:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :30/548 took 2101 ms. Total solver calls (SAT/UNSAT): 9089(292/8797)
Jun 02, 2017 8:23:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :54/548 took 3117 ms. Total solver calls (SAT/UNSAT): 16126(362/15764)
Jun 02, 2017 8:23:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :78/548 took 4144 ms. Total solver calls (SAT/UNSAT): 23162(432/22730)
Jun 02, 2017 8:23:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :102/548 took 5158 ms. Total solver calls (SAT/UNSAT): 30198(502/29696)
Jun 02, 2017 8:23:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :127/548 took 6162 ms. Total solver calls (SAT/UNSAT): 37512(575/36937)
Jun 02, 2017 8:23:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :151/548 took 7206 ms. Total solver calls (SAT/UNSAT): 44729(644/44085)
Jun 02, 2017 8:23:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :175/548 took 8236 ms. Total solver calls (SAT/UNSAT): 51766(714/51052)
Jun 02, 2017 8:23:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :198/548 took 9241 ms. Total solver calls (SAT/UNSAT): 58524(781/57743)
Jun 02, 2017 8:23:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :222/548 took 10272 ms. Total solver calls (SAT/UNSAT): 65560(851/64709)
Jun 02, 2017 8:23:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :243/548 took 11303 ms. Total solver calls (SAT/UNSAT): 71758(912/70846)
Jun 02, 2017 8:23:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :256/548 took 12320 ms. Total solver calls (SAT/UNSAT): 75547(950/74597)
Jun 02, 2017 8:23:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :269/548 took 13325 ms. Total solver calls (SAT/UNSAT): 79343(988/78355)
Jun 02, 2017 8:23:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :282/548 took 14347 ms. Total solver calls (SAT/UNSAT): 83139(1026/82113)
Jun 02, 2017 8:23:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :294/548 took 15370 ms. Total solver calls (SAT/UNSAT): 86838(1060/85778)
Jun 02, 2017 8:23:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :306/548 took 16374 ms. Total solver calls (SAT/UNSAT): 90357(1095/89262)
Jun 02, 2017 8:23:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :318/548 took 17381 ms. Total solver calls (SAT/UNSAT): 93875(1130/92745)
Jun 02, 2017 8:23:45 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
built 159 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions enregistrement_A, liberation_A, basculement, liberation_B, enregistrement_B, altern_cpt, timeout_A, timeout_B, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/3/8/11

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_BridgeAndVehicles-COL-V20P20N10"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_BridgeAndVehicles-COL-V20P20N10.tgz
mv S_BridgeAndVehicles-COL-V20P20N10 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is S_BridgeAndVehicles-COL-V20P20N10, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r090-csrt-149441076600305"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;