About the Execution of ITS-Tools for ResAllocation-PT-R003C020
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
445.100 | 8642.00 | 28019.00 | 86.70 | TTTTTTFTFFTTTFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is ResAllocation-PT-R003C020, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r070-csrt-149440964600099
=====================================================================
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content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-0
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-1
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-10
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-11
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-12
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-13
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-14
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-15
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-2
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-3
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-4
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-5
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-6
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-7
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-8
FORMULA_NAME ResAllocation-PT-R003C020-ReachabilityFireability-9
=== Now, execution of the tool begins
BK_START 1496306953409
Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-reach command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-15 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
// Phase 1: matrix 80 rows 120 cols
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + 1'p_16_1= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + 1'p_13_2= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + -1'r_16_2 + 1'r_17_2 + 1'p_18_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + 1'p_8_0= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + 1'p_15_2= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + -1'r_15_2 + 1'r_16_2 + -1'r_17_2 + 1'r_18_2 + 1'p_19_2= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + 1'p_11_1= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + 1'p_11_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + 1'p_10_0= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + 1'p_7_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + 1'p_12_1= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + 1'p_15_0= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + -1'r_16_1 + 1'r_17_1 + -1'r_18_1 + 1'r_19_1= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + 1'p_4_1= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + 1'p_12_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + 1'p_10_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + -1'r_15_0 + 1'r_16_0 + 1'p_17_0= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + -1'r_16_2 + 1'r_17_2 + -1'r_18_2 + 1'r_19_2= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + 1'p_3_2= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + 1'p_7_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + 1'p_7_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + 1'p_4_0= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + 1'p_6_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + 1'p_2_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + 1'p_6_0= 0
invariant : 1'p_0_0 + 1'r_0_0 + 1'p_1_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + 1'p_13_1= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + 1'p_16_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + -1'r_16_0 + 1'r_17_0 + -1'r_18_0 + 1'r_19_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + 1'p_14_2= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + 1'p_5_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + 1'p_2_0= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + 1'p_3_1= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + -1'r_15_1 + 1'r_16_1 + 1'p_17_1= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + -1'r_15_0 + 1'r_16_0 + -1'r_17_0 + 1'r_18_0 + 1'p_19_0= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + 1'p_6_2= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + -1'r_16_1 + 1'r_17_1 + 1'p_18_1= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + 1'p_5_2= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + -1'r_15_2 + 1'r_16_2 + 1'p_17_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + 1'p_8_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + 1'p_12_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + 1'p_3_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + 1'p_9_1= 1
invariant : 1'p_0_2 + 1'r_0_2 + 1'p_1_2= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + -1'r_15_1 + 1'r_16_1 + -1'r_17_1 + 1'r_18_1 + 1'p_19_1= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + 1'p_2_1= 0
invariant : 1'p_0_1 + 1'r_0_1 + 1'p_1_1= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + 1'p_9_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + 1'p_10_1= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + 1'p_13_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + -1'r_16_0 + 1'r_17_0 + 1'p_18_0= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + 1'p_5_0= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + 1'p_11_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + 1'p_14_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + 1'p_8_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + 1'p_9_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + 1'p_16_0= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + 1'p_15_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + 1'p_14_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + 1'p_4_2= 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 80 rows 120 cols
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + 1'p_16_1= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + 1'p_13_2= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + -1'r_16_2 + 1'r_17_2 + 1'p_18_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + 1'p_8_0= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + 1'p_15_2= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + -1'r_15_2 + 1'r_16_2 + -1'r_17_2 + 1'r_18_2 + 1'p_19_2= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + 1'p_11_1= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + 1'p_11_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + 1'p_10_0= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + 1'p_7_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + 1'p_12_1= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + 1'p_15_0= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + -1'r_16_1 + 1'r_17_1 + -1'r_18_1 + 1'r_19_1= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + 1'p_4_1= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + 1'p_12_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + 1'p_10_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + -1'r_15_0 + 1'r_16_0 + 1'p_17_0= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + -1'r_16_2 + 1'r_17_2 + -1'r_18_2 + 1'r_19_2= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + 1'p_3_2= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + 1'p_7_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + 1'p_7_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + 1'p_4_0= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + 1'p_6_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + 1'p_2_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + 1'p_6_0= 0
invariant : 1'p_0_0 + 1'r_0_0 + 1'p_1_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + 1'p_13_1= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + -1'r_14_2 + 1'r_15_2 + 1'p_16_2= 0
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + -1'r_16_0 + 1'r_17_0 + -1'r_18_0 + 1'r_19_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + -1'r_12_2 + 1'r_13_2 + 1'p_14_2= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + 1'p_5_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + 1'p_2_0= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + 1'p_3_1= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + -1'r_15_1 + 1'r_16_1 + 1'p_17_1= 1
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + -1'r_13_0 + 1'r_14_0 + -1'r_15_0 + 1'r_16_0 + -1'r_17_0 + 1'r_18_0 + 1'p_19_0= 1
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + 1'p_6_2= 0
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + -1'r_14_1 + 1'r_15_1 + -1'r_16_1 + 1'r_17_1 + 1'p_18_1= 0
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + 1'p_5_2= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + -1'r_11_2 + 1'r_12_2 + -1'r_13_2 + 1'r_14_2 + -1'r_15_2 + 1'r_16_2 + 1'p_17_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + 1'p_8_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + -1'r_8_2 + 1'r_9_2 + -1'r_10_2 + 1'r_11_2 + 1'p_12_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + 1'p_3_0= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + 1'p_9_1= 1
invariant : 1'p_0_2 + 1'r_0_2 + 1'p_1_2= 1
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + -1'r_15_1 + 1'r_16_1 + -1'r_17_1 + 1'r_18_1 + 1'p_19_1= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + 1'p_2_1= 0
invariant : 1'p_0_1 + 1'r_0_1 + 1'p_1_1= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + 1'p_9_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + 1'p_10_1= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + -1'r_9_0 + 1'r_10_0 + -1'r_11_0 + 1'r_12_0 + 1'p_13_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + -1'r_16_0 + 1'r_17_0 + 1'p_18_0= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + 1'p_5_0= 1
invariant : 1'p_0_2 + 1'r_0_2 + -1'r_1_2 + 1'r_2_2 + -1'r_3_2 + 1'r_4_2 + -1'r_5_2 + 1'r_6_2 + -1'r_7_2 + 1'r_8_2 + -1'r_9_2 + 1'r_10_2 + 1'p_11_2= 1
invariant : -1'p_0_1 + -1'r_0_1 + 1'r_1_1 + -1'r_2_1 + 1'r_3_1 + -1'r_4_1 + 1'r_5_1 + -1'r_6_1 + 1'r_7_1 + -1'r_8_1 + 1'r_9_1 + -1'r_10_1 + 1'r_11_1 + -1'r_12_1 + 1'r_13_1 + 1'p_14_1= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + -1'r_4_2 + 1'r_5_2 + -1'r_6_2 + 1'r_7_2 + 1'p_8_2= 0
invariant : 1'p_0_0 + 1'r_0_0 + -1'r_1_0 + 1'r_2_0 + -1'r_3_0 + 1'r_4_0 + -1'r_5_0 + 1'r_6_0 + -1'r_7_0 + 1'r_8_0 + 1'p_9_0= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + -1'r_14_0 + 1'r_15_0 + 1'p_16_0= 0
invariant : 1'p_0_1 + 1'r_0_1 + -1'r_1_1 + 1'r_2_1 + -1'r_3_1 + 1'r_4_1 + -1'r_5_1 + 1'r_6_1 + -1'r_7_1 + 1'r_8_1 + -1'r_9_1 + 1'r_10_1 + -1'r_11_1 + 1'r_12_1 + -1'r_13_1 + 1'r_14_1 + 1'p_15_1= 1
invariant : -1'p_0_0 + -1'r_0_0 + 1'r_1_0 + -1'r_2_0 + 1'r_3_0 + -1'r_4_0 + 1'r_5_0 + -1'r_6_0 + 1'r_7_0 + -1'r_8_0 + 1'r_9_0 + -1'r_10_0 + 1'r_11_0 + -1'r_12_0 + 1'r_13_0 + 1'p_14_0= 0
invariant : -1'p_0_2 + -1'r_0_2 + 1'r_1_2 + -1'r_2_2 + 1'r_3_2 + 1'p_4_2= 0
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-2 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Exit code :0
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Exit code :0
Exit code :1
Found Violation
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation\_PT\_R003C020\_flat\_flat,4.06455e+11,4.76269,123960,2,35492,5,514240,6,0,563,729698,0
Total reachable state count : 406454747136
Verifying 16 reachability properties.
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-0 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-0,672,4.77466,124188,2,225,6,514240,7,0,565,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-1 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-1,3.86499e+07,4.80414,124256,2,2350,7,514240,8,0,599,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-2 does not hold.
No reachable states exhibit your property : ResAllocation-PT-R003C020-ReachabilityFireability-2
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-2,0,4.84554,124256,1,0,7,514240,9,0,616,729698,0
Invariant property ResAllocation-PT-R003C020-ReachabilityFireability-3 does not hold.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-3 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-3,3.13098e+07,4.8636,124256,2,1185,8,514240,10,0,675,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-4 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-4,6,4.86439,124260,2,127,9,514240,11,0,676,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-5 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-5 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-5,5.32035e+09,4.96517,124260,2,21429,10,514240,12,0,707,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-6 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-6,3.95346e+07,5.00067,124260,2,2901,11,514240,13,0,721,729698,0
Invariant property ResAllocation-PT-R003C020-ReachabilityFireability-7 does not hold.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-7 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-7,9.66971e+08,5.25876,124260,2,9592,12,514240,14,0,773,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-8 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-8,3.12115e+08,5.28107,124260,2,3383,13,514240,15,0,807,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-9 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-9 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-9,128,5.2839,124260,2,167,14,514240,16,0,826,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-10 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-10,32768,5.29027,124260,2,163,15,514240,17,0,838,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-11 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-11,2,5.2909,124260,2,123,16,514240,18,0,840,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-12 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-12,4,5.29201,124260,2,125,17,514240,19,0,851,729698,0
Reachability property ResAllocation-PT-R003C020-ReachabilityFireability-13 is true.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-13,1.31597e+08,5.3517,124260,2,4251,18,514240,20,0,880,729698,0
Invariant property ResAllocation-PT-R003C020-ReachabilityFireability-14 does not hold.
FORMULA ResAllocation-PT-R003C020-ReachabilityFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-14,4,5.35266,124260,2,125,19,514240,21,0,883,729698,0
Invariant property ResAllocation-PT-R003C020-ReachabilityFireability-15 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C020-ReachabilityFireability-15,0,5.36565,124260,1,0,19,514240,22,0,891,729698,0
Exit code :0
BK_STOP 1496306962051
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityFireability -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 01, 2017 8:49:14 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 81 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 120 places.
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 80 transitions.
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 11 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 2 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable ResAllocation-PT-R003C020-ReachabilityFireability-15
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 298 ms.
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-0(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 60 place invariants in 45 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-1(UNSAT) depth K=0 took 11 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-2(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-3(UNSAT) depth K=0 took 1 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-4(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-5(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-6(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-7(UNSAT) depth K=0 took 1 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-8(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-9(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-10(UNSAT) depth K=0 took 1 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-11(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-12(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-13(UNSAT) depth K=0 took 1 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-14(UNSAT) depth K=0 took 0 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 60 place invariants in 26 ms
Jun 01, 2017 8:49:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-0(UNSAT) depth K=1 took 107 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-1(UNSAT) depth K=1 took 114 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-2(UNSAT) depth K=1 took 100 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-3(UNSAT) depth K=1 took 119 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 120 variables to be positive in 577 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 80 transitions.
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/80 took 3 ms. Total solver calls (SAT/UNSAT): 4(2/2)
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-4(UNSAT) depth K=1 took 119 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-5(UNSAT) depth K=1 took 123 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-6(UNSAT) depth K=1 took 118 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 325 ms. Total solver calls (SAT/UNSAT): 428(194/234)
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 80 transitions.
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 120 variables to be positive in 943 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-7(UNSAT) depth K=1 took 183 ms
Jun 01, 2017 8:49:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-8(UNSAT) depth K=1 took 65 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-9(UNSAT) depth K=1 took 116 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-10(UNSAT) depth K=1 took 59 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-0
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-0(SAT) depth K=0 took 279 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-11(UNSAT) depth K=1 took 56 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 458 ms. Total solver calls (SAT/UNSAT): 428(158/270)
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 80 transitions.
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-12(UNSAT) depth K=1 took 59 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-13(UNSAT) depth K=1 took 57 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-14(UNSAT) depth K=1 took 55 ms
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-1
Jun 01, 2017 8:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-1(SAT) depth K=0 took 501 ms
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ResAllocation-PT-R003C020-ReachabilityFireability-2
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ResAllocation-PT-R003C020-ReachabilityFireability-2
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-2(FALSE) depth K=0 took 353 ms
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-0(UNSAT) depth K=2 took 797 ms
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(46/80) took 1005 ms. Total solver calls (SAT/UNSAT): 2679(2513/166)
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished enabling matrix. took 1303 ms. Total solver calls (SAT/UNSAT): 3240(2967/273)
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 80 transitions.
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2911ms conformant to PINS in folder :/home/mcc/execution
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-3
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-3(SAT) depth K=0 took 675 ms
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-4
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-4(SAT) depth K=0 took 193 ms
Jun 01, 2017 8:49:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-1(UNSAT) depth K=2 took 827 ms
Jun 01, 2017 8:49:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-5
Jun 01, 2017 8:49:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-5(SAT) depth K=0 took 548 ms
Jun 01, 2017 8:49:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-6
Jun 01, 2017 8:49:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-6(SAT) depth K=0 took 250 ms
Jun 01, 2017 8:49:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-2(UNSAT) depth K=2 took 849 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-7
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-7(SAT) depth K=0 took 481 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-3(UNSAT) depth K=2 took 630 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-8
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-8(SAT) depth K=0 took 438 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-9
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-9(SAT) depth K=0 took 21 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-10
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-10(SAT) depth K=0 took 231 ms
Jun 01, 2017 8:49:20 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, ResAllocationPTR003C020ReachabilityFireability0==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.001: library has no initializer
pins2lts-seq, 0.001: loading model GAL
pins2lts-seq, 0.001: completed loading model GAL
pins2lts-seq, 0.001: Initializing POR dependencies: labels 96, guards 80
pins2lts-seq, 0.007: Expression is: (ResAllocationPTR003C020ReachabilityFireability0 == true )
pins2lts-seq, 0.007: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.007: There are 96 state labels and 1 edge labels
pins2lts-seq, 0.007: State length is 120, there are 80 groups
pins2lts-seq, 0.007: Running dfs search strategy
pins2lts-seq, 0.007: Using a tree for state storage
pins2lts-seq, 0.007: Visible groups: 0 / 80, labels: 1 / 96
pins2lts-seq, 0.007: POR cycle proviso: stack
pins2lts-seq, 0.313: explored 139 levels ~10000 states ~44124 transitions
pins2lts-seq, 0.434:
pins2lts-seq, 0.434: Invariant violation (ResAllocationPTR003C020ReachabilityFireability0==true) found at depth 35!
pins2lts-seq, 0.434:
pins2lts-seq, 0.434: exiting now
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-11
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-11(SAT) depth K=0 took 270 ms
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesResAllocation-PT-R003C020-ReachabilityFireability-12
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ResAllocation-PT-R003C020-ReachabilityFireability-12(SAT) depth K=0 took 18 ms
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C020-ReachabilityFireability-4(UNSAT) depth K=2 took 766 ms
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-0 with value :(p_7_0>=1)
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-1 with value :(((((p_18_1>=1)&&(r_18_2>=1))&&(r_17_2>=1))||((((p_18_0>=1)&&(r_18_1>=1))&&(r_17_1>=1))&&(!(p_13_0>=1))))&&((((((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1))&&(((r_9_1>=1)&&(p_9_2>=1))&&(r_8_1>=1)))&&((((r_11_1>=1)&&(p_11_2>=1))&&(r_10_1>=1))&&((r_15_2>=1)&&(r_14_2>=1))))&&((r_15_2>=1)&&(r_14_2>=1))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-2 with value :(((!(((r_18_0>=1)&&(r_17_0>=1))||(p_13_0>=1)))&&((r_10_0>=1)&&(r_9_0>=1)))&&((p_17_0>=1)&&(((r_17_0>=1)&&(p_17_1>=1))&&(r_16_0>=1))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-3 with value :((((!(((r_11_1>=1)&&(p_11_2>=1))&&(r_10_1>=1)))||(!((r_2_0>=1)&&(r_1_0>=1))))||(!((((p_4_1>=1)&&(r_4_2>=1))&&(r_3_2>=1))&&(p_0_2>=1))))||(((((r_12_0>=1)&&(r_11_0>=1))&&(((r_19_0>=1)&&(p_19_1>=1))&&(r_18_0>=1)))||((p_6_2>=1)&&(((r_19_0>=1)&&(p_19_1>=1))&&(r_18_0>=1))))||((((p_8_0>=1)&&(r_8_1>=1))&&(r_7_1>=1))&&((((r_3_1>=1)&&(p_3_2>=1))&&(r_2_1>=1))&&(((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1))))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-4 with value :(p_15_0>=1)
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-5 with value :(((((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1))||(!(p_3_0>=1)))&&(((!(((p_2_0>=1)&&(r_2_1>=1))&&(r_1_1>=1)))&&(p_8_2>=1))&&(((((p_8_0>=1)&&(r_8_1>=1))&&(r_7_1>=1))||(p_18_2>=1))&&(((r_3_2>=1)&&(r_2_2>=1))||(((r_17_1>=1)&&(p_17_2>=1))&&(r_16_1>=1))))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-6 with value :((!((!(((r_15_0>=1)&&(p_15_1>=1))&&(r_14_0>=1)))||(!(((p_18_1>=1)&&(r_18_2>=1))&&(r_17_2>=1)))))&&(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1)))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-7 with value :(((((((r_17_0>=1)&&(p_17_1>=1))&&(r_16_0>=1))&&((r_19_2>=1)&&(r_18_2>=1)))||((r_13_2>=1)&&(r_12_2>=1)))&&(((p_0_1>=1)&&(r_0_2>=1))&&(((r_17_2>=1)&&(r_16_2>=1))||((r_3_2>=1)&&(r_2_2>=1)))))||(!(((((r_17_0>=1)&&(p_17_1>=1))&&(r_16_0>=1))&&(((p_18_1>=1)&&(r_18_2>=1))&&(r_17_2>=1)))||((((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1))&&(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1))))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-8 with value :(((((p_18_1>=1)&&(r_18_2>=1))&&(r_17_2>=1))&&((p_0_1>=1)&&(r_0_2>=1)))&&((!((((p_6_1>=1)&&(r_6_2>=1))&&(r_5_2>=1))&&(((r_13_1>=1)&&(p_13_2>=1))&&(r_12_1>=1))))||(!((p_1_0>=1)&&(((r_7_1>=1)&&(p_7_2>=1))&&(r_6_1>=1))))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-9 with value :(!((((p_7_0>=1)||(((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1)))&&(!((r_13_2>=1)&&(r_12_2>=1))))||((((r_1_2>=1)&&(r_0_2>=1))||((r_4_0>=1)&&(r_3_0>=1)))||((p_0_2>=1)||(((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1))))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-10 with value :((((r_15_0>=1)&&(p_15_1>=1))&&(r_14_0>=1))&&(((((r_6_0>=1)&&(r_5_0>=1))&&(p_0_2>=1))&&(((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1)))||(p_11_0>=1)))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-11 with value :((p_13_0>=1)&&((r_16_0>=1)&&(r_15_0>=1)))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-12 with value :(!(((!(p_2_2>=1))||((r_19_2>=1)&&(r_18_2>=1)))||(((p_17_0>=1)&&((r_5_2>=1)&&(r_4_2>=1)))||((r_14_0>=1)&&(r_13_0>=1)))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-13 with value :((((!(p_19_0>=1))&&((((r_17_0>=1)&&(p_17_1>=1))&&(r_16_0>=1))||((r_1_2>=1)&&(r_0_2>=1))))||((!((r_15_2>=1)&&(r_14_2>=1)))&&(p_12_2>=1)))&&((((p_10_0>=1)&&(r_10_1>=1))&&(r_9_1>=1))&&(((((r_9_1>=1)&&(p_9_2>=1))&&(r_8_1>=1))||(p_4_2>=1))&&((((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1))&&(p_12_2>=1)))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-14 with value :(!((p_6_2>=1)&&((r_14_0>=1)&&(r_13_0>=1))))
Read property : ResAllocation-PT-R003C020-ReachabilityFireability-15 with value :(((!((p_4_2>=1)&&(((p_2_1>=1)&&(r_2_2>=1))&&(r_1_2>=1))))||(p_6_2>=1))||(p_4_2>=1))
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.itstools.ProcessController$1 run
WARNING: null
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
Jun 01, 2017 8:49:21 AM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
LTSmin timed out on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, ResAllocationPTR003C020ReachabilityFireability1==true], workingDir=/home/mcc/execution]
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C020"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C020.tgz
mv ResAllocation-PT-R003C020 execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C020, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r070-csrt-149440964600099"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;