Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is Planning-PT-none, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r050-smll-149440872000287
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Planning-PT-none-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1496408210727


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ctl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 128 rows 124 cols
invariant : 1'p49 + 1'p57= 1
invariant : 1'p18 + 1'p5= 1
invariant : 1'p64 + 1'p73= 1
invariant : 1'p14 + 1'p36= 1
invariant : 1'p17 + 1'p4= 1
invariant : 1'p21 + 1'p8= 1
invariant : 1'p13 + 1'p35= 1
invariant : 1'p67 + 1'p78= 1
invariant : 1'p32 + 1'p42= 1
invariant : 1'p16 + 1'p3= 1
invariant : 1'p62 + 1'p70= 1
invariant : 1'p31 + 1'p41= 1
invariant : 1'p45 + 1'p53= 1
invariant : 1'p68 + 1'p80= 1
invariant : 1'p12 + 1'p34= 1
invariant : 1'p28 + 1'p38= 1
invariant : 1'p30 + 1'p40= 1
invariant : -1'p1 + -1'p62 + -1'p63 + -1'p64 + -1'p65 + -1'p66 + -1'p67 + -1'p68 + 1'p81= -6
invariant : 1'p48 + 1'p56= 1
invariant : 1'p46 + 1'p54= 1
invariant : 1'p20 + 1'p7= 1
invariant : 1'p50 + 1'p58= 1
invariant : 1'p19 + 1'p6= 1
invariant : 1'p47 + 1'p55= 1
invariant : 1'p66 + 1'p77= 1
invariant : 1'p51 + 1'p59= 1
invariant : 1'p29 + 1'p39= 1
invariant : 1'p22 + 1'p9= 1
invariant : 1'p63 + 1'p71= 1
invariant : 1'p27 + 1'p37= 1
invariant : 1'p15 + 1'p2= 1
invariant : 1'p44 + 1'p52= 1
invariant : 1'p108 + 1'p43= 1
invariant : 1'p11 + 1'p33= 1
invariant : 1'p65 + 1'p74= 1
invariant : 1'p1 + 1'p10= 1
invariant : 1'p1 + 1'p62 + 1'p63 + 1'p64 + 1'p65 + 1'p66 + 1'p67 + 1'p68 + 1'p69= 7
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Exit code :0
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Exit code :0
Exit code :0
FORMULA Planning-PT-none-ReachabilityDeadlock-0 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Detected timeout of ITS tools.

BK_STOP 1496408258688

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 02, 2017 12:56:52 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2017 12:56:52 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 84 ms
Jun 02, 2017 12:56:52 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 126 places.
Jun 02, 2017 12:56:52 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 128 transitions.
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.logic.togal.ToGalTransformer toGal
WARNING: Unknown predicate type in boolean expression fr.lip6.move.gal.logic.impl.DeadlockImpl
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 2 fixed domain variables (out of 126 variables) in GAL type Planning_PT_none
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Found a total of 2 constant array cells/variables (out of 126 variables) in type Planning_PT_none
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: p24,p23,
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 2 constant variables :p24, p23
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 20 expressions due to constant valuations.
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Planning-PT-none-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 191 ms
Jun 02, 2017 12:56:53 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 15 ms
Jun 02, 2017 12:56:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 39 ms
Jun 02, 2017 12:56:54 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 124 variables to be positive in 558 ms
Jun 02, 2017 12:56:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 128 transitions.
Jun 02, 2017 12:56:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/128 took 41 ms. Total solver calls (SAT/UNSAT): 13(6/7)
Jun 02, 2017 12:56:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :59/128 took 1082 ms. Total solver calls (SAT/UNSAT): 368(174/194)
Jun 02, 2017 12:56:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :101/128 took 2106 ms. Total solver calls (SAT/UNSAT): 704(335/369)
Jun 02, 2017 12:56:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2878 ms. Total solver calls (SAT/UNSAT): 960(452/508)
Jun 02, 2017 12:56:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 128 transitions.
Jun 02, 2017 12:56:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :53/128 took 1029 ms. Total solver calls (SAT/UNSAT): 289(154/135)
Jun 02, 2017 12:56:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :72/128 took 2055 ms. Total solver calls (SAT/UNSAT): 562(291/271)
Jun 02, 2017 12:57:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :113/128 took 3058 ms. Total solver calls (SAT/UNSAT): 829(437/392)
Jun 02, 2017 12:57:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 3562 ms. Total solver calls (SAT/UNSAT): 960(508/452)
Jun 02, 2017 12:57:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 128 transitions.
Jun 02, 2017 12:57:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(3/128) took 1267 ms. Total solver calls (SAT/UNSAT): 506(480/26)
Jun 02, 2017 12:57:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(7/128) took 2519 ms. Total solver calls (SAT/UNSAT): 996(958/38)
Jun 02, 2017 12:57:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(11/128) took 3737 ms. Total solver calls (SAT/UNSAT): 1470(1424/46)
Jun 02, 2017 12:57:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(15/128) took 4915 ms. Total solver calls (SAT/UNSAT): 1928(1875/53)
Jun 02, 2017 12:57:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(19/128) took 6059 ms. Total solver calls (SAT/UNSAT): 2370(2312/58)
Jun 02, 2017 12:57:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(23/128) took 7124 ms. Total solver calls (SAT/UNSAT): 2796(2719/77)
Jun 02, 2017 12:57:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(27/128) took 8134 ms. Total solver calls (SAT/UNSAT): 3206(3104/102)
Jun 02, 2017 12:57:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(31/128) took 9135 ms. Total solver calls (SAT/UNSAT): 3600(3485/115)
Jun 02, 2017 12:57:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(36/128) took 10335 ms. Total solver calls (SAT/UNSAT): 4070(3941/129)
Jun 02, 2017 12:57:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(41/128) took 11462 ms. Total solver calls (SAT/UNSAT): 4515(4373/142)
Jun 02, 2017 12:57:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(46/128) took 12507 ms. Total solver calls (SAT/UNSAT): 4935(4776/159)
Jun 02, 2017 12:57:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(52/128) took 13679 ms. Total solver calls (SAT/UNSAT): 5406(5225/181)
Jun 02, 2017 12:57:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(58/128) took 14724 ms. Total solver calls (SAT/UNSAT): 5841(5625/216)
Jun 02, 2017 12:57:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(65/128) took 15801 ms. Total solver calls (SAT/UNSAT): 6303(6037/266)
Jun 02, 2017 12:57:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(73/128) took 16932 ms. Total solver calls (SAT/UNSAT): 6771(6475/296)
Jun 02, 2017 12:57:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(81/128) took 17972 ms. Total solver calls (SAT/UNSAT): 7175(6876/299)
Jun 02, 2017 12:57:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(91/128) took 19031 ms. Total solver calls (SAT/UNSAT): 7590(7279/311)
Jun 02, 2017 12:57:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(105/128) took 20046 ms. Total solver calls (SAT/UNSAT): 8003(7661/342)
Jun 02, 2017 12:57:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished enabling matrix. took 20659 ms. Total solver calls (SAT/UNSAT): 8256(7886/370)
Jun 02, 2017 12:57:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 128 transitions.
Jun 02, 2017 12:57:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 13696 ms. Total solver calls (SAT/UNSAT): 96(0/96)
Jun 02, 2017 12:57:35 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 41612ms conformant to PINS in folder :/home/mcc/execution
Jun 02, 2017 12:57:38 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
pins2lts-seq, 0.001: Registering PINS so language module
pins2lts-seq, 0.001: Loading model from ./gal.so
pins2lts-seq, 0.001: library has no initializer
pins2lts-seq, 0.001: loading model GAL
pins2lts-seq, 0.003: completed loading model GAL
pins2lts-seq, 0.003: Initializing POR dependencies: labels 129, guards 128
pins2lts-seq, 0.018: There are 129 state labels and 1 edge labels
pins2lts-seq, 0.018: State length is 124, there are 128 groups
pins2lts-seq, 0.018: Running dfs search strategy
pins2lts-seq, 0.018: Using a tree for state storage
pins2lts-seq, 0.018: Visible groups: 0 / 128, labels: 0 / 129
pins2lts-seq, 0.018: POR cycle proviso: none
pins2lts-seq, 0.019: state space 4 levels, 4 states 4 transitions

Jun 02, 2017 12:57:38 PM fr.lip6.move.gal.itstools.ProcessController$1 run
WARNING: null
Jun 02, 2017 12:57:38 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
Jun 02, 2017 12:57:38 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Planning-PT-none"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Planning-PT-none.tgz
mv Planning-PT-none execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is Planning-PT-none, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r050-smll-149440872000287"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;