Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is PermAdmissibility-PT-01, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r040-blw7-149440486600401
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-0
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-1
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-10
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-11
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-12
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-13
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-14
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-15
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-2
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-3
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-4
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-5
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-6
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-7
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-8
FORMULA_NAME PermAdmissibility-COL-01-LTLCardinality-9

=== Now, execution of the tool begins

BK_START 1496317482428


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ltl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(("(((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=c20")U(X("(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=c5")))))
Formula 0 simplified : !G("(((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=c20" U X"(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=c5")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant : -1'aux8_7 + 1'c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'c110 + 2'c9= 0
invariant : 2'c20 + 2'out7_1 + 2'out7_0 + 2'out7_3 + 2'out7_2 + 2'out7_5 + 2'out7_4 + 2'out7_7 + 2'out7_6 + 2'c19 + 1'aux13_2 + 1'aux13_1 + 1'aux13_0 + 1'aux13_7 + 1'c18 + 1'aux13_3 + 1'aux13_4 + 1'aux13_5 + 1'aux13_6 + 1'aux6_0 + 1'c12 + 1'aux6_5 + 1'aux6_1 + 1'aux6_4 + 2'c13 + 1'in3_5 + 1'in3_4 + 1'c6= 2
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + 1'out3_0 + 1'out3_1 + 1'out3_6 + 1'out3_7 + 1'out3_2 + 1'out3_3 + 1'out3_4 + 1'out3_5= 0
invariant : -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out8_1 + 1'out8_0 + 1'out8_3 + 1'out8_2 + 1'out8_6 + 1'out8_7 + 1'out8_4 + 1'out8_5= 0
invariant : 1'aux14_0 + 1'aux14_1 + 1'aux14_2 + 1'aux14_3 + 1'aux14_4 + 1'aux14_6 + 1'aux14_5 + -1'c20 + 1'aux14_7 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + 2'c14= 0
invariant : -2'c20 + -2'out7_1 + -2'out7_0 + -2'out7_3 + -2'out7_2 + -2'out7_5 + -2'out7_4 + -2'out7_7 + -2'out7_6 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux6_0 + -1'c12 + -1'aux6_5 + -1'aux6_1 + -1'aux6_4 + -2'c13 + -2'in3_5 + -2'in3_4 + 2'c5= -2
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + 1'out4_0 + 1'out4_1 + 1'out4_7 + 1'out4_6 + 1'out4_3 + 1'out4_2 + 1'out4_5 + 1'out4_4= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_4 + 1'aux16_5 + -1'c20 + -1'out7_3 + -1'out7_2 + -1'out7_7 + -1'out7_6 + 1'out5_1 + -1'c19 + 1'out5_0 + 1'out5_5 + 1'out5_4 + 1'aux15_1 + 1'aux15_0 + 1'aux15_5 + 1'aux15_4 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out3_7 + -1'out3_2 + -1'out3_3 + 1'out1_0 + 1'out1_5 + 1'out1_1 + 1'out1_4 + -1'c12 + 1'aux12_5 + 1'aux12_4 + 1'aux12_1 + 1'aux12_0 + -2'c13 + -1'c11 + 1'aux10_0 + 1'aux10_1 + 1'aux10_4 + 1'aux10_5= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_2 + 1'aux16_3 + 1'aux16_4 + 1'aux16_5 + 1'aux16_6 + 1'aux16_7 + -1'c20 + -2'c19 + -1'aux15_2 + -1'aux15_1 + -1'aux15_0 + -1'aux15_6 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + -1'aux15_7 + -1'c18 + 2'c16= 0
invariant : -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_6 + -1'aux14_5 + 1'c20 + -1'aux14_7 + 2'c19 + 1'aux15_2 + 1'aux15_1 + 1'aux15_0 + 1'aux15_6 + 1'aux15_5 + 1'aux15_4 + 1'aux15_3 + 1'aux15_7 + 1'c18 + 2'c15= 0
invariant : 1'aux8_7 + -1'c12 + 1'aux8_3 + 1'aux8_6 + 1'aux8_2 + -2'c11 + -1'aux7_7 + -1'aux7_6 + -1'c110 + -1'aux7_3 + -1'aux7_2 + 2'c8= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out5_1 + 1'out5_2 + 1'out5_0 + 1'out5_5 + 1'out5_6 + 1'out5_3 + 1'out5_4 + 1'out5_7= 0
invariant : -1'aux16_0 + -1'aux16_1 + 1'aux16_2 + 1'aux16_3 + -1'aux16_4 + -1'aux16_5 + 1'aux16_6 + 1'aux16_7 + 1'c20 + 2'out7_3 + 2'out7_2 + 2'out7_7 + 2'out7_6 + -2'out5_1 + -2'out5_0 + -2'out5_5 + -2'out5_4 + 1'aux15_2 + -1'aux15_1 + -1'aux15_0 + 1'aux15_6 + -1'aux15_5 + -1'aux15_4 + 1'aux15_3 + 1'aux15_7 + 1'c18 + 2'out3_6 + 2'out3_7 + 2'out3_2 + 2'out3_3 + -2'out1_0 + -2'out1_5 + -2'out1_1 + -2'out1_4 + -2'c12 + -2'aux12_5 + -2'aux12_4 + -2'aux12_1 + -2'aux12_0 + -2'c11 + 2'aux10_2 + 2'aux10_3 + 2'aux10_6 + 2'aux10_7= 0
invariant : 1'aux16_0 + 1'aux16_1 + 1'aux16_2 + 1'aux16_3 + 1'aux16_4 + 1'aux16_5 + 1'aux16_6 + 1'aux16_7 + -1'c20 + -2'c19 + 1'aux15_2 + 1'aux15_1 + 1'aux15_0 + 1'aux15_6 + 1'aux15_5 + 1'aux15_4 + 1'aux15_3 + -2'aux13_2 + -2'aux13_1 + -2'aux13_0 + 1'aux15_7 + -2'aux13_7 + -1'c18 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + 2'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + 2'aux12_1 + 2'aux12_0 + -4'c13 + 2'aux12_7= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + 1'out6_1 + 1'out6_2 + 1'out6_0 + 1'out6_6 + 1'out6_5 + 1'out6_4 + 1'out6_3 + 1'out6_7= 0
invariant : -1'in3_5 + -1'in3_4 + 1'in1_1 + 1'in1_0= 0
invariant : -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + 1'c20 + 2'c19 + 2'c18 + 2'c17= 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + -1'c18 + 1'out2_0 + 1'out2_7 + 1'out2_5 + 1'out2_6 + 1'out2_3 + 1'out2_4 + 1'out2_1 + 1'out2_2= 0
invariant : = 0
invariant : -1'c20 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_5 + -1'out7_4 + -1'out7_7 + -1'out7_6 + -1'c19 + -1'c18 + 1'out1_0 + 1'out1_6 + 1'out1_5 + 1'out1_7 + 1'out1_2 + 1'out1_1 + 1'out1_4 + 1'out1_3= 0
invariant : 1'aux14_0 + 1'aux14_1 + 1'aux14_2 + 1'aux14_3 + 1'aux14_4 + 1'aux14_6 + 1'aux14_5 + -1'c20 + 1'aux14_7 + -2'c19 + -1'aux13_2 + -1'aux13_1 + -1'aux13_0 + -1'aux13_7 + -1'c18 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -4'c12 + -4'c13 + 2'aux11_5 + 2'aux11_4 + 2'aux11_3 + 2'aux11_2 + 2'aux11_1 + 2'aux11_0 + 2'aux11_7 + 2'aux11_6= 0
28 unique states visited
12 strongly connected components in search stack
30 transitions explored
18 items max in DFS search stack
8229 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.4219,1814232,1,0,1178,3.663e+06,1152,561,18722,1.08062e+06,1309
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F(X("(((aux5_1+aux5_0)+aux5_5)+aux5_4)>=1")))))
Formula 1 simplified : !FX"(((aux5_1+aux5_0)+aux5_5)+aux5_4)>=1"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
3 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.453,1815148,1,0,1179,3.663e+06,1161,562,18729,1.08064e+06,1316
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((G((X("c6<=c110"))U(X("c9>=2")))))
Formula 2 simplified : !G(X"c6<=c110" U X"c9>=2")
19 unique states visited
18 strongly connected components in search stack
21 transitions explored
18 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,82.5218,1816996,1,0,1179,3.663e+06,1171,562,18737,1.08064e+06,1321
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-2 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(G(("c6<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)")U("c5<=c12")))))
Formula 3 simplified : !XG("c6<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)" U "c5<=c12")
17 unique states visited
0 strongly connected components in search stack
17 transitions explored
17 items max in DFS search stack
1640 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,98.9238,1893440,1,0,1206,3.66478e+06,1187,606,18799,1.14809e+06,1508
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-3 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((G(F(("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2)")U("(((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)<=c11")))))
Formula 4 simplified : !GF("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2)" U "(((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)<=c11")
23 unique states visited
0 strongly connected components in search stack
29 transitions explored
17 items max in DFS search stack
13 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,99.0541,1893476,1,0,1218,3.66517e+06,1196,617,18828,1.14901e+06,1584
no accepting run found
Formula 4 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F(G(G(F("(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)"))))))
Formula 5 simplified : !FGF"(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)"
19 unique states visited
0 strongly connected components in search stack
32 transitions explored
17 items max in DFS search stack
15 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,99.2019,1893536,1,0,1222,3.66612e+06,1205,620,18874,1.1599e+06,1632
no accepting run found
Formula 5 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-5 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F((X("c110>=2"))U(G("(((aux6_0+aux6_5)+aux6_1)+aux6_4)>=2")))))
Formula 6 simplified : !F(X"c110>=2" U G"(((aux6_0+aux6_5)+aux6_1)+aux6_4)>=2")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
47 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,99.6698,1893596,1,0,1269,3.66996e+06,1218,680,18892,1.16962e+06,1847
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-6 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("c110>=3"))
Formula 7 simplified : !"c110>=3"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,99.6729,1893600,1,0,1269,3.67002e+06,1221,680,18894,1.16965e+06,1852
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-7 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !(((F(G("(in1_1+in1_0)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)")))U(F(G("(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=(((aux5_1+aux5_0)+aux5_5)+aux5_4)")))))
Formula 8 simplified : !(FG"(in1_1+in1_0)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)" U FG"(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)<=(((aux5_1+aux5_0)+aux5_5)+aux5_4)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
43 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,100.106,1893992,1,0,1297,3.6718e+06,1234,740,18982,1.17758e+06,2050
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !(((("(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)")U("(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)"))U(("c5<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)")U("c14>=3"))))
Formula 9 simplified : !(("(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)<=(((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)" U "(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)") U ("c5<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)" U "c14>=3"))
17 unique states visited
17 strongly connected components in search stack
17 transitions explored
17 items max in DFS search stack
80 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,100.897,1894856,1,0,1297,3.67376e+06,1269,740,19197,1.17986e+06,2232
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !((G(("(((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7)>=1")U(F("(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2")))))
Formula 10 simplified : !G("(((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7)>=1" U F"(((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2")
19 unique states visited
19 strongly connected components in search stack
20 transitions explored
19 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,100.974,1894892,1,0,1297,3.67668e+06,1278,740,19217,1.1816e+06,2270
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !(("(((aux6_0+aux6_5)+aux6_1)+aux6_4)<=(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)"))
Formula 11 simplified : !"(((aux6_0+aux6_5)+aux6_1)+aux6_4)<=(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,100.976,1894892,1,0,1297,3.67668e+06,1281,740,19230,1.1816e+06,2272
no accepting run found
Formula 11 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((X(("c17<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)")U(G("(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)>=1")))))
Formula 12 simplified : !X("c17<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)" U G"(((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)>=1")
17 unique states visited
0 strongly connected components in search stack
29 transitions explored
15 items max in DFS search stack
43 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,101.414,1894936,1,0,1334,3.67811e+06,1302,820,19390,1.203e+06,2644
no accepting run found
Formula 12 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(((X(G("(in2_2+in2_3)<=c7")))U(F(X("(in2_2+in2_3)>=2")))))
Formula 13 simplified : !(XG"(in2_2+in2_3)<=c7" U FX"(in2_2+in2_3)>=2")
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,101.416,1894960,1,0,1334,3.67811e+06,1311,820,19393,1.203e+06,2648
no accepting run found
Formula 13 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((X(F(F("c9<=c12")))))
Formula 14 simplified : !XF"c9<=c12"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,101.417,1894960,1,0,1334,3.67811e+06,1320,820,19397,1.203e+06,2652
no accepting run found
Formula 14 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !((G(X(G(G("(((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1"))))))
Formula 15 simplified : !GXG"(((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,101.423,1894964,1,0,1334,3.67817e+06,1326,820,19412,1.20304e+06,2660
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA PermAdmissibility-COL-01-LTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Exit code :0

BK_STOP 1496317590798

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination LTLCardinality -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 01, 2017 11:44:43 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2017 11:44:43 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 111 ms
Jun 01, 2017 11:44:43 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
Jun 01, 2017 11:44:44 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
Jun 01, 2017 11:44:44 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 210 ms
Jun 01, 2017 11:44:44 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 34 ms
Jun 01, 2017 11:44:44 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Jun 01, 2017 11:44:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 21 place invariants in 155 ms
Jun 01, 2017 11:44:54 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 9317 ms
Jun 01, 2017 11:44:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 592 transitions.
Jun 01, 2017 11:44:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/592 took 73 ms. Total solver calls (SAT/UNSAT): 136(8/128)
Jun 01, 2017 11:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :15/592 took 1128 ms. Total solver calls (SAT/UNSAT): 2176(128/2048)
Jun 01, 2017 11:44:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :30/592 took 2186 ms. Total solver calls (SAT/UNSAT): 4216(248/3968)
Jun 01, 2017 11:44:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :45/592 took 3221 ms. Total solver calls (SAT/UNSAT): 6256(368/5888)
Jun 01, 2017 11:44:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :59/592 took 4360 ms. Total solver calls (SAT/UNSAT): 8175(536/7639)
Jun 01, 2017 11:44:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :63/592 took 5397 ms. Total solver calls (SAT/UNSAT): 8779(792/7987)
Jun 01, 2017 11:45:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :67/592 took 6441 ms. Total solver calls (SAT/UNSAT): 9383(1048/8335)
Jun 01, 2017 11:45:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :71/592 took 7476 ms. Total solver calls (SAT/UNSAT): 9987(1304/8683)
Jun 01, 2017 11:45:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :77/592 took 8618 ms. Total solver calls (SAT/UNSAT): 10893(1688/9205)
Jun 01, 2017 11:45:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :83/592 took 9728 ms. Total solver calls (SAT/UNSAT): 11799(2072/9727)
Jun 01, 2017 11:45:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :89/592 took 10952 ms. Total solver calls (SAT/UNSAT): 12705(2456/10249)
Jun 01, 2017 11:45:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :93/592 took 11997 ms. Total solver calls (SAT/UNSAT): 13309(2712/10597)
Jun 01, 2017 11:45:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :97/592 took 13032 ms. Total solver calls (SAT/UNSAT): 13913(2968/10945)
Jun 01, 2017 11:45:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :102/592 took 14153 ms. Total solver calls (SAT/UNSAT): 14653(3232/11421)
Jun 01, 2017 11:45:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :109/592 took 15211 ms. Total solver calls (SAT/UNSAT): 15650(3456/12194)
Jun 01, 2017 11:45:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :113/592 took 16233 ms. Total solver calls (SAT/UNSAT): 16254(3712/12542)
Jun 01, 2017 11:45:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :117/592 took 17246 ms. Total solver calls (SAT/UNSAT): 16858(3968/12890)
Jun 01, 2017 11:45:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :121/592 took 18279 ms. Total solver calls (SAT/UNSAT): 17462(4224/13238)
Jun 01, 2017 11:45:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :135/592 took 19314 ms. Total solver calls (SAT/UNSAT): 19381(4392/14989)
Jun 01, 2017 11:45:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :152/592 took 20315 ms. Total solver calls (SAT/UNSAT): 21693(4528/17165)
Jun 01, 2017 11:45:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :158/592 took 21440 ms. Total solver calls (SAT/UNSAT): 22569(4800/17769)
Jun 01, 2017 11:45:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :172/592 took 22468 ms. Total solver calls (SAT/UNSAT): 24488(4968/19520)
Jun 01, 2017 11:45:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :187/592 took 23540 ms. Total solver calls (SAT/UNSAT): 26495(5144/21351)
Jun 01, 2017 11:45:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :192/592 took 24728 ms. Total solver calls (SAT/UNSAT): 27010(5464/21546)
Jun 01, 2017 11:45:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :197/592 took 25896 ms. Total solver calls (SAT/UNSAT): 27525(5784/21741)
Jun 01, 2017 11:45:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :202/592 took 27053 ms. Total solver calls (SAT/UNSAT): 28040(6104/21936)
Jun 01, 2017 11:45:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :207/592 took 28202 ms. Total solver calls (SAT/UNSAT): 28555(6424/22131)
Jun 01, 2017 11:45:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :212/592 took 29316 ms. Total solver calls (SAT/UNSAT): 29070(6744/22326)
Jun 01, 2017 11:45:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :217/592 took 30437 ms. Total solver calls (SAT/UNSAT): 29585(7064/22521)
Jun 01, 2017 11:45:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :226/592 took 31461 ms. Total solver calls (SAT/UNSAT): 30677(7360/23317)
Jun 01, 2017 11:45:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :232/592 took 32527 ms. Total solver calls (SAT/UNSAT): 31295(7744/23551)
Jun 01, 2017 11:45:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :238/592 took 33583 ms. Total solver calls (SAT/UNSAT): 31913(8128/23785)
Jun 01, 2017 11:45:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :244/592 took 34651 ms. Total solver calls (SAT/UNSAT): 32531(8512/24019)
Jun 01, 2017 11:45:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :250/592 took 35695 ms. Total solver calls (SAT/UNSAT): 33149(8896/24253)
Jun 01, 2017 11:45:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :275/592 took 36776 ms. Total solver calls (SAT/UNSAT): 33708(9277/24431)
Jun 01, 2017 11:45:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :287/592 took 37856 ms. Total solver calls (SAT/UNSAT): 34356(9645/24711)
Jun 01, 2017 11:45:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :300/592 took 38868 ms. Total solver calls (SAT/UNSAT): 34866(9926/24940)
Jun 01, 2017 11:45:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :313/592 took 39869 ms. Total solver calls (SAT/UNSAT): 35314(10225/25089)
Jun 01, 2017 11:45:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :320/592 took 40891 ms. Total solver calls (SAT/UNSAT): 36383(10632/25751)
Jun 01, 2017 11:45:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :330/592 took 41969 ms. Total solver calls (SAT/UNSAT): 37428(10992/26436)
Jun 01, 2017 11:45:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :347/592 took 43000 ms. Total solver calls (SAT/UNSAT): 38212(11244/26968)
Jun 01, 2017 11:45:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :352/592 took 44090 ms. Total solver calls (SAT/UNSAT): 39077(11564/27513)
Jun 01, 2017 11:45:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :359/592 took 45235 ms. Total solver calls (SAT/UNSAT): 40288(12012/28276)
Jun 01, 2017 11:45:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :366/592 took 46377 ms. Total solver calls (SAT/UNSAT): 41499(12460/29039)
Jun 01, 2017 11:45:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :372/592 took 47382 ms. Total solver calls (SAT/UNSAT): 42537(12844/29693)
Jun 01, 2017 11:45:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :379/592 took 48484 ms. Total solver calls (SAT/UNSAT): 43748(13292/30456)
Jun 01, 2017 11:45:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :395/592 took 49561 ms. Total solver calls (SAT/UNSAT): 46351(13623/32728)
Jun 01, 2017 11:45:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :402/592 took 50657 ms. Total solver calls (SAT/UNSAT): 47562(14071/33491)
Jun 01, 2017 11:45:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :408/592 took 51834 ms. Total solver calls (SAT/UNSAT): 48600(14455/34145)
Jun 01, 2017 11:45:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :427/592 took 52861 ms. Total solver calls (SAT/UNSAT): 51632(14600/37032)
Jun 01, 2017 11:45:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :449/592 took 53993 ms. Total solver calls (SAT/UNSAT): 55138(14748/40390)
Jun 01, 2017 11:45:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :454/592 took 55132 ms. Total solver calls (SAT/UNSAT): 56003(15068/40935)
Jun 01, 2017 11:45:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :461/592 took 56148 ms. Total solver calls (SAT/UNSAT): 57169(15327/41842)
Jun 01, 2017 11:45:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :477/592 took 57267 ms. Total solver calls (SAT/UNSAT): 59742(15532/44210)
Jun 01, 2017 11:45:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :482/592 took 58409 ms. Total solver calls (SAT/UNSAT): 60607(15852/44755)
Jun 01, 2017 11:45:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :487/592 took 59566 ms. Total solver calls (SAT/UNSAT): 61472(16172/45300)
Jun 01, 2017 11:45:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :492/592 took 60694 ms. Total solver calls (SAT/UNSAT): 62337(16492/45845)
Jun 01, 2017 11:45:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :497/592 took 61853 ms. Total solver calls (SAT/UNSAT): 63202(16812/46390)
Jun 01, 2017 11:45:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :502/592 took 63018 ms. Total solver calls (SAT/UNSAT): 64067(17132/46935)
Jun 01, 2017 11:45:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :507/592 took 64124 ms. Total solver calls (SAT/UNSAT): 64932(17452/47480)
Jun 01, 2017 11:45:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :512/592 took 65258 ms. Total solver calls (SAT/UNSAT): 65797(17772/48025)
Jun 01, 2017 11:46:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :517/592 took 66377 ms. Total solver calls (SAT/UNSAT): 66662(18092/48570)
Jun 01, 2017 11:46:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :522/592 took 67506 ms. Total solver calls (SAT/UNSAT): 67527(18412/49115)
Jun 01, 2017 11:46:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :536/592 took 68602 ms. Total solver calls (SAT/UNSAT): 69784(18615/51169)
Jun 01, 2017 11:46:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :554/592 took 69604 ms. Total solver calls (SAT/UNSAT): 72658(18759/53899)
Jun 01, 2017 11:46:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :583/592 took 70628 ms. Total solver calls (SAT/UNSAT): 77240(18788/58452)
Jun 01, 2017 11:46:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 70890 ms. Total solver calls (SAT/UNSAT): 78504(18796/59708)
Jun 01, 2017 11:46:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 592 transitions.
Jun 01, 2017 11:46:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :3/592 took 1225 ms. Total solver calls (SAT/UNSAT): 544(272/272)
Jun 01, 2017 11:46:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :7/592 took 2496 ms. Total solver calls (SAT/UNSAT): 1088(544/544)
Jun 01, 2017 11:46:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :10/592 took 3602 ms. Total solver calls (SAT/UNSAT): 1496(748/748)
Jun 01, 2017 11:46:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :13/592 took 4681 ms. Total solver calls (SAT/UNSAT): 1904(952/952)
Jun 01, 2017 11:46:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :16/592 took 5759 ms. Total solver calls (SAT/UNSAT): 2312(1156/1156)
Jun 01, 2017 11:46:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :19/592 took 6840 ms. Total solver calls (SAT/UNSAT): 2720(1360/1360)
Jun 01, 2017 11:46:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :22/592 took 7933 ms. Total solver calls (SAT/UNSAT): 3128(1564/1564)
Jun 01, 2017 11:46:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :25/592 took 9004 ms. Total solver calls (SAT/UNSAT): 3536(1768/1768)
Jun 01, 2017 11:46:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :28/592 took 10082 ms. Total solver calls (SAT/UNSAT): 3944(1972/1972)
Jun 01, 2017 11:46:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :31/592 took 11134 ms. Total solver calls (SAT/UNSAT): 4352(2176/2176)
Jun 01, 2017 11:46:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :34/592 took 12201 ms. Total solver calls (SAT/UNSAT): 4760(2380/2380)
Jun 01, 2017 11:46:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :38/592 took 13288 ms. Total solver calls (SAT/UNSAT): 5304(2652/2652)
Jun 01, 2017 11:46:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :42/592 took 14349 ms. Total solver calls (SAT/UNSAT): 5848(2924/2924)
Jun 01, 2017 11:46:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :46/592 took 15433 ms. Total solver calls (SAT/UNSAT): 6392(3196/3196)
Jun 01, 2017 11:46:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :50/592 took 16506 ms. Total solver calls (SAT/UNSAT): 6936(3468/3468)
Jun 01, 2017 11:46:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :54/592 took 17582 ms. Total solver calls (SAT/UNSAT): 7480(3740/3740)
Jun 01, 2017 11:46:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :58/592 took 18638 ms. Total solver calls (SAT/UNSAT): 8024(4012/4012)
Jun 01, 2017 11:46:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :62/592 took 19643 ms. Total solver calls (SAT/UNSAT): 8628(4284/4344)
Jun 01, 2017 11:46:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :67/592 took 20884 ms. Total solver calls (SAT/UNSAT): 9383(4624/4759)
Jun 01, 2017 11:46:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :71/592 took 21921 ms. Total solver calls (SAT/UNSAT): 9987(4896/5091)
Jun 01, 2017 11:46:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :75/592 took 23013 ms. Total solver calls (SAT/UNSAT): 10591(5168/5423)
Jun 01, 2017 11:46:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :79/592 took 24090 ms. Total solver calls (SAT/UNSAT): 11195(5440/5755)
Jun 01, 2017 11:46:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :83/592 took 25180 ms. Total solver calls (SAT/UNSAT): 11799(5712/6087)
Jun 01, 2017 11:46:30 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions switch9_2_0, switch9_3_0, switch9_4_0, switch9_3_5, switch9_1_5, switch9_2_5, switch9_7_4, switch9_0_5, switch9_6_4, switch9_3_6, switch9_4_6, switch9_1_6, switch9_2_6, switch9_7_5, switch9_0_6, switch9_6_5, switch9_4_7, switch9_3_7, switch9_2_7, switch9_1_7, switch9_0_7, switch9_5_6, switch10_4_0, switch10_3_0, switch10_2_0, switch9_5_7, switch9_2_1, switch9_3_1, switch9_4_1, switch9_5_0, switch9_6_0, switch9_7_0, switch9_1_2, switch9_4_2, switch9_5_1, switch9_6_1, switch9_7_1, switch9_0_2, switch9_1_3, switch9_4_3, switch9_6_2, switch9_5_2, switch9_0_3, switch9_7_2, switch9_2_4, switch9_1_4, switch9_3_4, switch9_6_3, switch9_5_3, switch9_0_4, switch9_7_3, switch10_7_4, switch10_0_5, switch10_6_4, switch10_3_5, switch10_1_5, switch10_2_5, switch10_7_5, switch10_0_6, switch10_6_5, switch10_3_6, switch10_4_6, switch10_1_6, switch10_2_6, switch10_0_7, switch10_5_6, switch10_4_7, switch10_3_7, switch10_2_7, switch10_1_7, switch10_5_7, switch11_4_0, switch11_3_0, switch11_2_0, switch10_5_0, switch10_6_0, switch10_7_0, switch10_2_1, switch10_3_1, switch10_4_1, switch10_5_1, switch10_6_1, switch10_7_1, switch10_0_2, switch10_1_2, switch10_4_2, switch10_6_2, switch10_5_2, switch10_0_3, switch10_7_2, switch10_1_3, switch10_4_3, switch10_6_3, switch10_5_3, switch10_0_4, switch10_7_3, switch10_2_4, switch10_1_4, switch10_3_4, switch11_4_6, switch11_3_6, switch11_2_6, switch11_1_6, switch11_0_6, switch11_7_5, switch11_6_5, switch11_3_5, switch11_2_5, switch11_1_5, switch11_0_5, switch11_7_4, switch11_6_4, switch11_5_7, switch11_3_7, switch11_4_7, switch11_1_7, switch11_2_7, switch11_0_7, switch11_5_6, switch11_1_2, switch11_4_2, switch11_6_1, switch11_5_1, switch11_0_2, switch11_7_1, switch11_2_1, switch11_4_1, switch11_3_1, switch11_6_0, switch11_5_0, switch11_7_0, switch11_1_4, switch11_2_4, switch11_3_4, switch11_5_3, switch11_6_3, switch11_7_3, switch11_0_4, switch11_1_3, switch11_4_3, switch11_5_2, switch11_6_2, switch11_7_2, switch11_0_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :64/384/144/592
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states
Computing Next relation with stutter on 18688 deadlock states

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-01"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-01.tgz
mv PermAdmissibility-PT-01 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-PT-01, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r040-blw7-149440486600401"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;