fond
Model Checking Contest @ Petri Nets 2017
7th edition, Zaragoza, Spain, June 27, 2017
Execution of r040-blw7-149440486400187
Last Updated
June 27, 2017

About the Execution of ITS-Tools for LamportFastMutEx-PT-7

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
12383.510 540776.00 1973324.00 155.50 TFFFFFFTFFFTTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r040-blw7-149440486400187
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-0
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-1
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-15
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-2
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-3
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-4
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-5
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-6
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-7
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-8
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-9

=== Now, execution of the tool begins

BK_START 1496274230996


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-reach command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 536 rows 264 cols
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 536 rows 264 cols
invariant : 1'P_wait_3_3 + -1'P_await_13_3 + 1'P_done_3_3= 0
invariant : 1'P_wait_0_2 + -1'P_await_13_0 + 1'P_done_0_2= 0
invariant : 1'P_wait_4_3 + -1'P_await_13_4 + 1'P_done_4_3= 0
invariant : 1'P_b_5_false + 1'P_b_5_true= 1
invariant : 1'P_wait_4_0 + 1'P_done_4_0= 0
invariant : 1'P_start_1_6 + 1'P_setx_3_6 + 1'P_setbi_5_6 + 1'P_ify0_4_6 + 1'P_sety_9_6 + 1'P_ifxi_10_6 + 1'P_setbi_11_6 + 1'P_fordo_12_6 + 1'P_await_13_6 + 1'P_ifyi_15_6 + 1'P_awaity_6 + 1'P_CS_21_6 + 1'P_setbi_24_6= 1
invariant : 1'P_wait_0_6 + -1'P_await_13_0 + 1'P_done_0_6= 0
invariant : 1'P_start_1_2 + 1'P_setx_3_2 + 1'P_setbi_5_2 + 1'P_ify0_4_2 + 1'P_sety_9_2 + 1'P_ifxi_10_2 + 1'P_setbi_11_2 + 1'P_fordo_12_2 + 1'P_await_13_2 + 1'P_ifyi_15_2 + 1'P_awaity_2 + 1'P_CS_21_2 + 1'P_setbi_24_2= 1
invariant : 1'P_wait_1_6 + -1'P_await_13_1 + 1'P_done_1_6= 0
invariant : 1'P_wait_5_2 + -1'P_await_13_5 + 1'P_done_5_2= 0
invariant : 1'P_wait_4_7 + -1'P_await_13_4 + 1'P_done_4_7= 0
invariant : 1'P_wait_5_3 + -1'P_await_13_5 + 1'P_done_5_3= 0
invariant : 1'P_wait_5_0 + 1'P_done_5_0= 0
invariant : 1'P_b_0_false + 1'P_b_0_true= 0
invariant : 1'P_wait_6_4 + -1'P_await_13_6 + 1'P_done_6_4= 0
invariant : 1'P_wait_6_5 + -1'P_await_13_6 + 1'P_done_6_5= 0
invariant : 1'P_wait_3_2 + -1'P_await_13_3 + 1'P_done_3_2= 0
invariant : 1'P_wait_7_4 + -1'P_await_13_7 + 1'P_done_7_4= 0
invariant : 1'P_wait_0_5 + -1'P_await_13_0 + 1'P_done_0_5= 0
invariant : 1'P_wait_2_6 + -1'P_await_13_2 + 1'P_done_2_6= 0
invariant : 1'P_wait_6_7 + -1'P_await_13_6 + 1'P_done_6_7= 0
invariant : 1'P_wait_3_7 + -1'P_await_13_3 + 1'P_done_3_7= 0
invariant : 1'P_wait_2_1 + -1'P_await_13_2 + 1'P_done_2_1= 0
invariant : 1'P_b_4_false + 1'P_b_4_true= 1
invariant : 1'P_start_1_4 + 1'P_setx_3_4 + 1'P_setbi_5_4 + 1'P_ify0_4_4 + 1'P_sety_9_4 + 1'P_ifxi_10_4 + 1'P_setbi_11_4 + 1'P_fordo_12_4 + 1'P_await_13_4 + 1'P_ifyi_15_4 + 1'P_awaity_4 + 1'P_CS_21_4 + 1'P_setbi_24_4= 1
invariant : 1'P_wait_5_1 + -1'P_await_13_5 + 1'P_done_5_1= 0
invariant : 1'P_wait_1_2 + -1'P_await_13_1 + 1'P_done_1_2= 0
invariant : 1'P_wait_3_5 + -1'P_await_13_3 + 1'P_done_3_5= 0
invariant : 1'P_wait_2_5 + -1'P_await_13_2 + 1'P_done_2_5= 0
invariant : 1'P_wait_6_2 + -1'P_await_13_6 + 1'P_done_6_2= 0
invariant : 1'P_start_1_1 + 1'P_setx_3_1 + 1'P_setbi_5_1 + 1'P_ify0_4_1 + 1'P_sety_9_1 + 1'P_ifxi_10_1 + 1'P_setbi_11_1 + 1'P_fordo_12_1 + 1'P_await_13_1 + 1'P_ifyi_15_1 + 1'P_awaity_1 + 1'P_CS_21_1 + 1'P_setbi_24_1= 1
invariant : 1'P_b_1_false + 1'P_b_1_true= 1
invariant : 1'P_wait_0_1 + -1'P_await_13_0 + 1'P_done_0_1= 0
invariant : 1'P_wait_0_0 + 1'P_done_0_0= 0
invariant : 1'P_wait_1_3 + -1'P_await_13_1 + 1'P_done_1_3= 0
invariant : 1'P_wait_1_0 + 1'P_done_1_0= 0
invariant : 1'P_start_1_3 + 1'P_setx_3_3 + 1'P_setbi_5_3 + 1'P_ify0_4_3 + 1'P_sety_9_3 + 1'P_ifxi_10_3 + 1'P_setbi_11_3 + 1'P_fordo_12_3 + 1'P_await_13_3 + 1'P_ifyi_15_3 + 1'P_awaity_3 + 1'P_CS_21_3 + 1'P_setbi_24_3= 1
invariant : 1'P_wait_1_5 + -1'P_await_13_1 + 1'P_done_1_5= 0
invariant : 1'P_wait_2_7 + -1'P_await_13_2 + 1'P_done_2_7= 0
invariant : 1'P_wait_0_7 + -1'P_await_13_0 + 1'P_done_0_7= 0
invariant : 1'P_wait_5_7 + -1'P_await_13_5 + 1'P_done_5_7= 0
invariant : 1'P_wait_4_6 + -1'P_await_13_4 + 1'P_done_4_6= 0
invariant : 1'P_b_7_false + 1'P_b_7_true= 1
invariant : 1'P_wait_7_7 + -1'P_await_13_7 + 1'P_done_7_7= 0
invariant : 1'P_wait_7_6 + -1'P_await_13_7 + 1'P_done_7_6= 0
invariant : 1'y_0 + 1'y_1 + 1'y_2 + 1'y_3 + 1'y_4 + 1'y_5 + 1'y_6 + 1'y_7= 1
invariant : 1'P_wait_7_1 + -1'P_await_13_7 + 1'P_done_7_1= 0
invariant : 1'P_wait_6_1 + -1'P_await_13_6 + 1'P_done_6_1= 0
invariant : 1'P_wait_4_4 + -1'P_await_13_4 + 1'P_done_4_4= 0
invariant : 1'P_b_3_false + 1'P_b_3_true= 1
invariant : 1'P_wait_2_4 + -1'P_await_13_2 + 1'P_done_2_4= 0
invariant : 1'P_wait_5_5 + -1'P_await_13_5 + 1'P_done_5_5= 0
invariant : 1'P_start_1_5 + 1'P_setx_3_5 + 1'P_setbi_5_5 + 1'P_ify0_4_5 + 1'P_sety_9_5 + 1'P_ifxi_10_5 + 1'P_setbi_11_5 + 1'P_fordo_12_5 + 1'P_await_13_5 + 1'P_ifyi_15_5 + 1'P_awaity_5 + 1'P_CS_21_5 + 1'P_setbi_24_5= 1
invariant : 1'P_wait_2_2 + -1'P_await_13_2 + 1'P_done_2_2= 0
invariant : 1'P_wait_6_0 + 1'P_done_6_0= 0
invariant : 1'P_wait_1_1 + -1'P_await_13_1 + 1'P_done_1_1= 0
invariant : 1'P_b_6_false + 1'P_b_6_true= 1
invariant : 1'P_wait_7_5 + -1'P_await_13_7 + 1'P_done_7_5= 0
invariant : 1'P_start_1_0 + 1'P_setx_3_0 + 1'P_setbi_5_0 + 1'P_ify0_4_0 + 1'P_sety_9_0 + 1'P_ifxi_10_0 + 1'P_setbi_11_0 + 1'P_fordo_12_0 + 1'P_await_13_0 + 1'P_ifyi_15_0 + 1'P_awaity_0 + 1'P_CS_21_0 + 1'P_setbi_24_0= 0
invariant : 1'P_wait_4_1 + -1'P_await_13_4 + 1'P_done_4_1= 0
invariant : 1'P_wait_7_0 + 1'P_done_7_0= 0
invariant : 1'P_wait_2_3 + -1'P_await_13_2 + 1'P_done_2_3= 0
invariant : 1'P_wait_3_1 + -1'P_await_13_3 + 1'P_done_3_1= 0
invariant : 1'P_b_2_false + 1'P_b_2_true= 1
invariant : 1'P_wait_3_4 + -1'P_await_13_3 + 1'P_done_3_4= 0
invariant : 1'P_wait_4_2 + -1'P_await_13_4 + 1'P_done_4_2= 0
invariant : 1'P_wait_5_4 + -1'P_await_13_5 + 1'P_done_5_4= 0
invariant : 1'P_wait_7_2 + -1'P_await_13_7 + 1'P_done_7_2= 0
invariant : 1'P_wait_5_6 + -1'P_await_13_5 + 1'P_done_5_6= 0
invariant : 1'P_wait_1_4 + -1'P_await_13_1 + 1'P_done_1_4= 0
invariant : 1'P_wait_1_7 + -1'P_await_13_1 + 1'P_done_1_7= 0
invariant : 1'P_wait_0_4 + -1'P_await_13_0 + 1'P_done_0_4= 0
invariant : 1'P_wait_7_3 + -1'P_await_13_7 + 1'P_done_7_3= 0
invariant : 1'P_wait_3_6 + -1'P_await_13_3 + 1'P_done_3_6= 0
invariant : 1'P_wait_6_6 + -1'P_await_13_6 + 1'P_done_6_6= 0
invariant : 1'P_wait_6_3 + -1'P_await_13_6 + 1'P_done_6_3= 0
invariant : 1'P_wait_4_5 + -1'P_await_13_4 + 1'P_done_4_5= 0
invariant : 1'P_wait_0_3 + -1'P_await_13_0 + 1'P_done_0_3= 0
invariant : 1'x_0 + 1'x_1 + 1'x_2 + 1'x_3 + 1'x_4 + 1'x_5 + 1'x_6 + 1'x_7= 1
invariant : 1'P_wait_2_0 + 1'P_done_2_0= 0
invariant : 1'P_start_1_7 + 1'P_setx_3_7 + 1'P_setbi_5_7 + 1'P_ify0_4_7 + 1'P_sety_9_7 + 1'P_ifxi_10_7 + 1'P_setbi_11_7 + 1'P_fordo_12_7 + 1'P_await_13_7 + 1'P_ifyi_15_7 + 1'P_awaity_7 + 1'P_CS_21_7 + 1'P_setbi_24_7= 1
invariant : 1'P_wait_3_0 + 1'P_done_3_0= 0
invariant : 1'P_wait_3_3 + -1'P_await_13_3 + 1'P_done_3_3= 0
invariant : 1'P_wait_0_2 + -1'P_await_13_0 + 1'P_done_0_2= 0
invariant : 1'P_wait_4_3 + -1'P_await_13_4 + 1'P_done_4_3= 0
invariant : 1'P_b_5_false + 1'P_b_5_true= 1
invariant : 1'P_wait_4_0 + 1'P_done_4_0= 0
invariant : 1'P_start_1_6 + 1'P_setx_3_6 + 1'P_setbi_5_6 + 1'P_ify0_4_6 + 1'P_sety_9_6 + 1'P_ifxi_10_6 + 1'P_setbi_11_6 + 1'P_fordo_12_6 + 1'P_await_13_6 + 1'P_ifyi_15_6 + 1'P_awaity_6 + 1'P_CS_21_6 + 1'P_setbi_24_6= 1
invariant : 1'P_wait_0_6 + -1'P_await_13_0 + 1'P_done_0_6= 0
invariant : 1'P_start_1_2 + 1'P_setx_3_2 + 1'P_setbi_5_2 + 1'P_ify0_4_2 + 1'P_sety_9_2 + 1'P_ifxi_10_2 + 1'P_setbi_11_2 + 1'P_fordo_12_2 + 1'P_await_13_2 + 1'P_ifyi_15_2 + 1'P_awaity_2 + 1'P_CS_21_2 + 1'P_setbi_24_2= 1
invariant : 1'P_wait_1_6 + -1'P_await_13_1 + 1'P_done_1_6= 0
invariant : 1'P_wait_5_2 + -1'P_await_13_5 + 1'P_done_5_2= 0
invariant : 1'P_wait_4_7 + -1'P_await_13_4 + 1'P_done_4_7= 0
invariant : 1'P_wait_5_3 + -1'P_await_13_5 + 1'P_done_5_3= 0
invariant : 1'P_wait_5_0 + 1'P_done_5_0= 0
invariant : 1'P_b_0_false + 1'P_b_0_true= 0
invariant : 1'P_wait_6_4 + -1'P_await_13_6 + 1'P_done_6_4= 0
invariant : 1'P_wait_6_5 + -1'P_await_13_6 + 1'P_done_6_5= 0
invariant : 1'P_wait_3_2 + -1'P_await_13_3 + 1'P_done_3_2= 0
invariant : 1'P_wait_7_4 + -1'P_await_13_7 + 1'P_done_7_4= 0
invariant : 1'P_wait_0_5 + -1'P_await_13_0 + 1'P_done_0_5= 0
invariant : 1'P_wait_2_6 + -1'P_await_13_2 + 1'P_done_2_6= 0
invariant : 1'P_wait_6_7 + -1'P_await_13_6 + 1'P_done_6_7= 0
invariant : 1'P_wait_3_7 + -1'P_await_13_3 + 1'P_done_3_7= 0
invariant : 1'P_wait_2_1 + -1'P_await_13_2 + 1'P_done_2_1= 0
invariant : 1'P_b_4_false + 1'P_b_4_true= 1
invariant : 1'P_start_1_4 + 1'P_setx_3_4 + 1'P_setbi_5_4 + 1'P_ify0_4_4 + 1'P_sety_9_4 + 1'P_ifxi_10_4 + 1'P_setbi_11_4 + 1'P_fordo_12_4 + 1'P_await_13_4 + 1'P_ifyi_15_4 + 1'P_awaity_4 + 1'P_CS_21_4 + 1'P_setbi_24_4= 1
invariant : 1'P_wait_5_1 + -1'P_await_13_5 + 1'P_done_5_1= 0
invariant : 1'P_wait_1_2 + -1'P_await_13_1 + 1'P_done_1_2= 0
invariant : 1'P_wait_3_5 + -1'P_await_13_3 + 1'P_done_3_5= 0
invariant : 1'P_wait_2_5 + -1'P_await_13_2 + 1'P_done_2_5= 0
invariant : 1'P_wait_6_2 + -1'P_await_13_6 + 1'P_done_6_2= 0
invariant : 1'P_start_1_1 + 1'P_setx_3_1 + 1'P_setbi_5_1 + 1'P_ify0_4_1 + 1'P_sety_9_1 + 1'P_ifxi_10_1 + 1'P_setbi_11_1 + 1'P_fordo_12_1 + 1'P_await_13_1 + 1'P_ifyi_15_1 + 1'P_awaity_1 + 1'P_CS_21_1 + 1'P_setbi_24_1= 1
invariant : 1'P_b_1_false + 1'P_b_1_true= 1
invariant : 1'P_wait_0_1 + -1'P_await_13_0 + 1'P_done_0_1= 0
invariant : 1'P_wait_0_0 + 1'P_done_0_0= 0
invariant : 1'P_wait_1_3 + -1'P_await_13_1 + 1'P_done_1_3= 0
invariant : 1'P_wait_1_0 + 1'P_done_1_0= 0
invariant : 1'P_start_1_3 + 1'P_setx_3_3 + 1'P_setbi_5_3 + 1'P_ify0_4_3 + 1'P_sety_9_3 + 1'P_ifxi_10_3 + 1'P_setbi_11_3 + 1'P_fordo_12_3 + 1'P_await_13_3 + 1'P_ifyi_15_3 + 1'P_awaity_3 + 1'P_CS_21_3 + 1'P_setbi_24_3= 1
invariant : 1'P_wait_1_5 + -1'P_await_13_1 + 1'P_done_1_5= 0
invariant : 1'P_wait_2_7 + -1'P_await_13_2 + 1'P_done_2_7= 0
invariant : 1'P_wait_0_7 + -1'P_await_13_0 + 1'P_done_0_7= 0
invariant : 1'P_wait_5_7 + -1'P_await_13_5 + 1'P_done_5_7= 0
invariant : 1'P_wait_4_6 + -1'P_await_13_4 + 1'P_done_4_6= 0
invariant : 1'P_b_7_false + 1'P_b_7_true= 1
invariant : 1'P_wait_7_7 + -1'P_await_13_7 + 1'P_done_7_7= 0
invariant : 1'P_wait_7_6 + -1'P_await_13_7 + 1'P_done_7_6= 0
invariant : 1'y_0 + 1'y_1 + 1'y_2 + 1'y_3 + 1'y_4 + 1'y_5 + 1'y_6 + 1'y_7= 1
invariant : 1'P_wait_7_1 + -1'P_await_13_7 + 1'P_done_7_1= 0
invariant : 1'P_wait_6_1 + -1'P_await_13_6 + 1'P_done_6_1= 0
invariant : 1'P_wait_4_4 + -1'P_await_13_4 + 1'P_done_4_4= 0
invariant : 1'P_b_3_false + 1'P_b_3_true= 1
invariant : 1'P_wait_2_4 + -1'P_await_13_2 + 1'P_done_2_4= 0
invariant : 1'P_wait_5_5 + -1'P_await_13_5 + 1'P_done_5_5= 0
invariant : 1'P_start_1_5 + 1'P_setx_3_5 + 1'P_setbi_5_5 + 1'P_ify0_4_5 + 1'P_sety_9_5 + 1'P_ifxi_10_5 + 1'P_setbi_11_5 + 1'P_fordo_12_5 + 1'P_await_13_5 + 1'P_ifyi_15_5 + 1'P_awaity_5 + 1'P_CS_21_5 + 1'P_setbi_24_5= 1
invariant : 1'P_wait_2_2 + -1'P_await_13_2 + 1'P_done_2_2= 0
invariant : 1'P_wait_6_0 + 1'P_done_6_0= 0
invariant : 1'P_wait_1_1 + -1'P_await_13_1 + 1'P_done_1_1= 0
invariant : 1'P_b_6_false + 1'P_b_6_true= 1
invariant : 1'P_wait_7_5 + -1'P_await_13_7 + 1'P_done_7_5= 0
invariant : 1'P_start_1_0 + 1'P_setx_3_0 + 1'P_setbi_5_0 + 1'P_ify0_4_0 + 1'P_sety_9_0 + 1'P_ifxi_10_0 + 1'P_setbi_11_0 + 1'P_fordo_12_0 + 1'P_await_13_0 + 1'P_ifyi_15_0 + 1'P_awaity_0 + 1'P_CS_21_0 + 1'P_setbi_24_0= 0
invariant : 1'P_wait_4_1 + -1'P_await_13_4 + 1'P_done_4_1= 0
invariant : 1'P_wait_7_0 + 1'P_done_7_0= 0
invariant : 1'P_wait_2_3 + -1'P_await_13_2 + 1'P_done_2_3= 0
invariant : 1'P_wait_3_1 + -1'P_await_13_3 + 1'P_done_3_1= 0
invariant : 1'P_b_2_false + 1'P_b_2_true= 1
invariant : 1'P_wait_3_4 + -1'P_await_13_3 + 1'P_done_3_4= 0
invariant : 1'P_wait_4_2 + -1'P_await_13_4 + 1'P_done_4_2= 0
invariant : 1'P_wait_5_4 + -1'P_await_13_5 + 1'P_done_5_4= 0
invariant : 1'P_wait_7_2 + -1'P_await_13_7 + 1'P_done_7_2= 0
invariant : 1'P_wait_5_6 + -1'P_await_13_5 + 1'P_done_5_6= 0
invariant : 1'P_wait_1_4 + -1'P_await_13_1 + 1'P_done_1_4= 0
invariant : 1'P_wait_1_7 + -1'P_await_13_1 + 1'P_done_1_7= 0
invariant : 1'P_wait_0_4 + -1'P_await_13_0 + 1'P_done_0_4= 0
invariant : 1'P_wait_7_3 + -1'P_await_13_7 + 1'P_done_7_3= 0
invariant : 1'P_wait_3_6 + -1'P_await_13_3 + 1'P_done_3_6= 0
invariant : 1'P_wait_6_6 + -1'P_await_13_6 + 1'P_done_6_6= 0
invariant : 1'P_wait_6_3 + -1'P_await_13_6 + 1'P_done_6_3= 0
invariant : 1'P_wait_4_5 + -1'P_await_13_4 + 1'P_done_4_5= 0
invariant : 1'P_wait_0_3 + -1'P_await_13_0 + 1'P_done_0_3= 0
invariant : 1'x_0 + 1'x_1 + 1'x_2 + 1'x_3 + 1'x_4 + 1'x_5 + 1'x_6 + 1'x_7= 1
invariant : 1'P_wait_2_0 + 1'P_done_2_0= 0
invariant : 1'P_start_1_7 + 1'P_setx_3_7 + 1'P_setbi_5_7 + 1'P_ify0_4_7 + 1'P_sety_9_7 + 1'P_ifxi_10_7 + 1'P_setbi_11_7 + 1'P_fordo_12_7 + 1'P_await_13_7 + 1'P_ifyi_15_7 + 1'P_awaity_7 + 1'P_CS_21_7 + 1'P_setbi_24_7= 1
invariant : 1'P_wait_3_0 + 1'P_done_3_0= 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Exit code :0
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Exit code :0
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-1 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-2 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-3 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-4 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-5 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-6 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-7 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-8 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-9 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Exit code :1
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-15 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Detected timeout of ITS tools.

BK_STOP 1496274771772

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityCardinality -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
May 31, 2017 11:43:52 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2017 11:43:52 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 94 ms
May 31, 2017 11:43:52 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 264 places.
May 31, 2017 11:43:52 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 536 transitions.
May 31, 2017 11:43:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 124 ms
May 31, 2017 11:43:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 68 ms
May 31, 2017 11:43:53 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 26 ms
May 31, 2017 11:43:53 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 342 ms.
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-0(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-1(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-2(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-3(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-4(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-5(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-6(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-7(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-8(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-9(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=0 took 1 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=0 took 0 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 274 ms
May 31, 2017 11:43:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 154 ms
May 31, 2017 11:43:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-0(UNSAT) depth K=1 took 1745 ms
May 31, 2017 11:43:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-1(UNSAT) depth K=1 took 1559 ms
May 31, 2017 11:43:57 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 3872 ms
May 31, 2017 11:43:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
May 31, 2017 11:43:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/536 took 4 ms. Total solver calls (SAT/UNSAT): 13(1/12)
May 31, 2017 11:43:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-2(UNSAT) depth K=1 took 694 ms
May 31, 2017 11:43:57 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 4047 ms
May 31, 2017 11:43:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :65/536 took 1008 ms. Total solver calls (SAT/UNSAT): 2010(590/1420)
May 31, 2017 11:43:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-3(UNSAT) depth K=1 took 1278 ms
May 31, 2017 11:43:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :127/536 took 2014 ms. Total solver calls (SAT/UNSAT): 4248(1162/3086)
May 31, 2017 11:44:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-4(UNSAT) depth K=1 took 1612 ms
May 31, 2017 11:44:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :272/536 took 3024 ms. Total solver calls (SAT/UNSAT): 6622(1623/4999)
May 31, 2017 11:44:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-0
May 31, 2017 11:44:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-0(SAT) depth K=0 took 3385 ms
May 31, 2017 11:44:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :341/536 took 4028 ms. Total solver calls (SAT/UNSAT): 8854(2212/6642)
May 31, 2017 11:44:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :415/536 took 5037 ms. Total solver calls (SAT/UNSAT): 11936(2721/9215)
May 31, 2017 11:44:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-1
May 31, 2017 11:44:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-1(SAT) depth K=0 took 1438 ms
May 31, 2017 11:44:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-5(UNSAT) depth K=1 took 2513 ms
May 31, 2017 11:44:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :487/536 took 6042 ms. Total solver calls (SAT/UNSAT): 14168(3322/10846)
May 31, 2017 11:44:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-6(UNSAT) depth K=1 took 810 ms
May 31, 2017 11:44:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 6346 ms. Total solver calls (SAT/UNSAT): 14992(3486/11506)
May 31, 2017 11:44:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
May 31, 2017 11:44:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-7(UNSAT) depth K=1 took 836 ms
May 31, 2017 11:44:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :40/536 took 1005 ms. Total solver calls (SAT/UNSAT): 1109(399/710)
May 31, 2017 11:44:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-8(UNSAT) depth K=1 took 791 ms
May 31, 2017 11:44:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :71/536 took 2065 ms. Total solver calls (SAT/UNSAT): 2238(763/1475)
May 31, 2017 11:44:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :114/536 took 3086 ms. Total solver calls (SAT/UNSAT): 3749(1048/2701)
May 31, 2017 11:44:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :148/536 took 4095 ms. Total solver calls (SAT/UNSAT): 5043(1463/3580)
May 31, 2017 11:44:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :255/536 took 5095 ms. Total solver calls (SAT/UNSAT): 6112(1912/4200)
May 31, 2017 11:44:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :291/536 took 6101 ms. Total solver calls (SAT/UNSAT): 7192(2417/4775)
May 31, 2017 11:44:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :332/536 took 7103 ms. Total solver calls (SAT/UNSAT): 8542(2768/5774)
May 31, 2017 11:44:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :368/536 took 8123 ms. Total solver calls (SAT/UNSAT): 9894(3130/6764)
May 31, 2017 11:44:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :381/536 took 9131 ms. Total solver calls (SAT/UNSAT): 10976(3700/7276)
May 31, 2017 11:44:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-9(UNSAT) depth K=1 took 8262 ms
May 31, 2017 11:44:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :421/536 took 10137 ms. Total solver calls (SAT/UNSAT): 12164(4152/8012)
May 31, 2017 11:44:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :460/536 took 11141 ms. Total solver calls (SAT/UNSAT): 13565(4567/8998)
May 31, 2017 11:44:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :510/536 took 12145 ms. Total solver calls (SAT/UNSAT): 14679(4933/9746)
May 31, 2017 11:44:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12347 ms. Total solver calls (SAT/UNSAT): 14992(4963/10029)
May 31, 2017 11:44:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
May 31, 2017 11:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=1 took 2771 ms
May 31, 2017 11:44:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(2/536) took 943 ms. Total solver calls (SAT/UNSAT): 1605(1174/431)
May 31, 2017 11:44:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(6/536) took 2020 ms. Total solver calls (SAT/UNSAT): 3731(2730/1001)
May 31, 2017 11:44:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(10/536) took 3052 ms. Total solver calls (SAT/UNSAT): 5841(4270/1571)
May 31, 2017 11:44:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(16/536) took 4091 ms. Total solver calls (SAT/UNSAT): 8976(5628/3348)
May 31, 2017 11:44:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(23/536) took 5226 ms. Total solver calls (SAT/UNSAT): 12588(7104/5484)
May 31, 2017 11:44:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(30/536) took 6355 ms. Total solver calls (SAT/UNSAT): 16151(8567/7584)
May 31, 2017 11:44:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(37/536) took 7481 ms. Total solver calls (SAT/UNSAT): 19665(10030/9635)
May 31, 2017 11:44:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=1 took 7426 ms
May 31, 2017 11:44:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=1 took 505 ms
May 31, 2017 11:44:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(44/536) took 8598 ms. Total solver calls (SAT/UNSAT): 23130(11487/11643)
May 31, 2017 11:44:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(51/536) took 9751 ms. Total solver calls (SAT/UNSAT): 26546(12938/13608)
May 31, 2017 11:44:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=1 took 1939 ms
May 31, 2017 11:44:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(58/536) took 10850 ms. Total solver calls (SAT/UNSAT): 29913(14383/15530)
May 31, 2017 11:44:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=1 took 910 ms
May 31, 2017 11:44:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=1 took 911 ms
May 31, 2017 11:44:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(65/536) took 11975 ms. Total solver calls (SAT/UNSAT): 33231(15822/17409)
May 31, 2017 11:44:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-2
May 31, 2017 11:44:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-2(SAT) depth K=0 took 26346 ms
May 31, 2017 11:44:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(73/536) took 12996 ms. Total solver calls (SAT/UNSAT): 36963(17052/19911)
May 31, 2017 11:44:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(83/536) took 14008 ms. Total solver calls (SAT/UNSAT): 41538(18060/23478)
May 31, 2017 11:44:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(90/536) took 15023 ms. Total solver calls (SAT/UNSAT): 44681(19410/25271)
May 31, 2017 11:44:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(98/536) took 16104 ms. Total solver calls (SAT/UNSAT): 48213(20793/27420)
May 31, 2017 11:44:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-3
May 31, 2017 11:44:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-3(SAT) depth K=0 took 4140 ms
May 31, 2017 11:44:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(105/536) took 17128 ms. Total solver calls (SAT/UNSAT): 51251(22177/29074)
May 31, 2017 11:44:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-4
May 31, 2017 11:44:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-4(SAT) depth K=0 took 415 ms
May 31, 2017 11:44:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(112/536) took 18150 ms. Total solver calls (SAT/UNSAT): 54240(23555/30685)
May 31, 2017 11:44:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(119/536) took 19267 ms. Total solver calls (SAT/UNSAT): 57180(24927/32253)
May 31, 2017 11:44:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(126/536) took 20271 ms. Total solver calls (SAT/UNSAT): 60071(26292/33779)
May 31, 2017 11:44:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(134/536) took 21408 ms. Total solver calls (SAT/UNSAT): 63315(27844/35471)
May 31, 2017 11:44:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(142/536) took 22531 ms. Total solver calls (SAT/UNSAT): 66495(29388/37107)
May 31, 2017 11:44:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(154/536) took 23679 ms. Total solver calls (SAT/UNSAT): 71145(30621/40524)
May 31, 2017 11:44:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(160/536) took 24735 ms. Total solver calls (SAT/UNSAT): 73416(32013/41403)
May 31, 2017 11:44:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(166/536) took 25923 ms. Total solver calls (SAT/UNSAT): 75651(33666/41985)
May 31, 2017 11:44:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(172/536) took 26932 ms. Total solver calls (SAT/UNSAT): 77850(35019/42831)
May 31, 2017 11:44:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(179/536) took 28109 ms. Total solver calls (SAT/UNSAT): 80370(36609/43761)
May 31, 2017 11:44:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(186/536) took 29257 ms. Total solver calls (SAT/UNSAT): 82841(38160/44681)
May 31, 2017 11:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-5
May 31, 2017 11:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-5(SAT) depth K=0 took 12262 ms
May 31, 2017 11:44:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(193/536) took 30381 ms. Total solver calls (SAT/UNSAT): 85263(39678/45585)
May 31, 2017 11:44:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(200/536) took 31479 ms. Total solver calls (SAT/UNSAT): 87636(41160/46476)
May 31, 2017 11:44:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(206/536) took 32500 ms. Total solver calls (SAT/UNSAT): 89631(42606/47025)
May 31, 2017 11:44:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(213/536) took 33526 ms. Total solver calls (SAT/UNSAT): 91913(44013/47900)
May 31, 2017 11:44:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(227/536) took 34613 ms. Total solver calls (SAT/UNSAT): 96330(45177/51153)
May 31, 2017 11:44:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(235/536) took 35729 ms. Total solver calls (SAT/UNSAT): 98766(46772/51994)
May 31, 2017 11:44:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(242/536) took 36756 ms. Total solver calls (SAT/UNSAT): 100845(48322/52523)
May 31, 2017 11:44:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(253/536) took 37844 ms. Total solver calls (SAT/UNSAT): 104013(49794/54219)
May 31, 2017 11:44:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(264/536) took 38919 ms. Total solver calls (SAT/UNSAT): 107060(51293/55767)
May 31, 2017 11:44:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(275/536) took 39967 ms. Total solver calls (SAT/UNSAT): 109986(52776/57210)
May 31, 2017 11:44:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(286/536) took 40992 ms. Total solver calls (SAT/UNSAT): 112791(54244/58547)
May 31, 2017 11:44:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(300/536) took 42011 ms. Total solver calls (SAT/UNSAT): 116186(55566/60620)
May 31, 2017 11:44:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-0(UNSAT) depth K=2 took 30251 ms
May 31, 2017 11:44:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(315/536) took 43021 ms. Total solver calls (SAT/UNSAT): 119606(56576/63030)
May 31, 2017 11:45:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(331/536) took 44047 ms. Total solver calls (SAT/UNSAT): 123006(57900/65106)
May 31, 2017 11:45:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(348/536) took 45086 ms. Total solver calls (SAT/UNSAT): 126338(59271/67067)
May 31, 2017 11:45:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(371/536) took 46111 ms. Total solver calls (SAT/UNSAT): 130386(60474/69912)
May 31, 2017 11:45:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(389/536) took 47140 ms. Total solver calls (SAT/UNSAT): 133185(61908/71277)
May 31, 2017 11:45:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-6
May 31, 2017 11:45:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-6(SAT) depth K=0 took 18492 ms
May 31, 2017 11:45:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(408/536) took 48152 ms. Total solver calls (SAT/UNSAT): 135788(63340/72448)
May 31, 2017 11:45:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(429/536) took 49178 ms. Total solver calls (SAT/UNSAT): 138245(64678/73567)
May 31, 2017 11:45:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(465/536) took 50181 ms. Total solver calls (SAT/UNSAT): 141431(66013/75418)
May 31, 2017 11:45:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished enabling matrix. took 50864 ms. Total solver calls (SAT/UNSAT): 143916(66759/77157)
May 31, 2017 11:45:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 536 transitions.
May 31, 2017 11:45:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2017 11:45:07 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 73933ms conformant to PINS in folder :/home/mcc/execution
May 31, 2017 11:45:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-7
May 31, 2017 11:45:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-7(SAT) depth K=0 took 3675 ms
May 31, 2017 11:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-8
May 31, 2017 11:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-8(SAT) depth K=0 took 275 ms
May 31, 2017 11:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-9
May 31, 2017 11:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-9(SAT) depth K=0 took 154 ms
May 31, 2017 11:45:14 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality0==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.293: Expression is: (LamportFastMutExCOL7ReachabilityCardinality0 == true )
pins2lts-seq, 0.293: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.293: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.293: State length is 264, there are 536 groups
pins2lts-seq, 0.293: Running dfs search strategy
pins2lts-seq, 0.293: Using a tree for state storage
pins2lts-seq, 0.293: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.293: POR cycle proviso: stack
pins2lts-seq, 0.306:
pins2lts-seq, 0.306: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality0==true) found at depth 38!
pins2lts-seq, 0.306:
pins2lts-seq, 0.306: exiting now

May 31, 2017 11:45:14 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality1==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.273: Expression is: (LamportFastMutExCOL7ReachabilityCardinality1 == true )
pins2lts-seq, 0.273: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.274: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.274: State length is 264, there are 536 groups
pins2lts-seq, 0.274: Running dfs search strategy
pins2lts-seq, 0.274: Using a tree for state storage
pins2lts-seq, 0.274: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.274: POR cycle proviso: stack
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality1==true) found at depth 7!
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: exiting now

May 31, 2017 11:45:15 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality2==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.274: Expression is: (LamportFastMutExCOL7ReachabilityCardinality2 == true )
pins2lts-seq, 0.274: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.275: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.275: State length is 264, there are 536 groups
pins2lts-seq, 0.275: Running dfs search strategy
pins2lts-seq, 0.275: Using a tree for state storage
pins2lts-seq, 0.275: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.275: POR cycle proviso: stack
pins2lts-seq, 0.312:
pins2lts-seq, 0.312: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality2==true) found at depth 166!
pins2lts-seq, 0.312:
pins2lts-seq, 0.312: exiting now

May 31, 2017 11:45:15 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality3==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.298: Expression is: (LamportFastMutExCOL7ReachabilityCardinality3 == true )
pins2lts-seq, 0.298: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.299: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.299: State length is 264, there are 536 groups
pins2lts-seq, 0.299: Running dfs search strategy
pins2lts-seq, 0.299: Using a tree for state storage
pins2lts-seq, 0.299: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.299: POR cycle proviso: stack
pins2lts-seq, 0.514:
pins2lts-seq, 0.514: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality3==true) found at depth 987!
pins2lts-seq, 0.514:
pins2lts-seq, 0.514: exiting now

May 31, 2017 11:45:16 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality4==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.276: Expression is: (LamportFastMutExCOL7ReachabilityCardinality4 == true )
pins2lts-seq, 0.276: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.277: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.277: State length is 264, there are 536 groups
pins2lts-seq, 0.277: Running dfs search strategy
pins2lts-seq, 0.277: Using a tree for state storage
pins2lts-seq, 0.277: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.277: POR cycle proviso: stack
pins2lts-seq, 0.284:
pins2lts-seq, 0.284: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality4==true) found at depth 21!
pins2lts-seq, 0.284:
pins2lts-seq, 0.284: exiting now

May 31, 2017 11:45:16 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality5==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.005: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.272: Expression is: (LamportFastMutExCOL7ReachabilityCardinality5 == true )
pins2lts-seq, 0.272: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.273: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.273: State length is 264, there are 536 groups
pins2lts-seq, 0.273: Running dfs search strategy
pins2lts-seq, 0.273: Using a tree for state storage
pins2lts-seq, 0.273: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.273: POR cycle proviso: stack
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality5==true) found at depth 25!
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: exiting now

May 31, 2017 11:45:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-10
May 31, 2017 11:45:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(SAT) depth K=0 took 9428 ms
May 31, 2017 11:45:19 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality6==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.005: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.273: Expression is: (LamportFastMutExCOL7ReachabilityCardinality6 == true )
pins2lts-seq, 0.273: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.274: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.274: State length is 264, there are 536 groups
pins2lts-seq, 0.274: Running dfs search strategy
pins2lts-seq, 0.274: Using a tree for state storage
pins2lts-seq, 0.274: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.274: POR cycle proviso: stack
pins2lts-seq, 2.345: explored 9900 levels ~10000 states ~46416 transitions
pins2lts-seq, 2.700:
pins2lts-seq, 2.700: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality6==true) found at depth 11492!
pins2lts-seq, 2.700:
pins2lts-seq, 2.700: exiting now

May 31, 2017 11:45:19 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality7==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.273: Expression is: (LamportFastMutExCOL7ReachabilityCardinality7 == true )
pins2lts-seq, 0.273: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.273: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.273: State length is 264, there are 536 groups
pins2lts-seq, 0.273: Running dfs search strategy
pins2lts-seq, 0.273: Using a tree for state storage
pins2lts-seq, 0.273: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.273: POR cycle proviso: stack
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality7==true) found at depth 18!
pins2lts-seq, 0.277:
pins2lts-seq, 0.277: exiting now

May 31, 2017 11:45:19 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality8==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.005: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.272: Expression is: (LamportFastMutExCOL7ReachabilityCardinality8 == true )
pins2lts-seq, 0.272: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.272: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.272: State length is 264, there are 536 groups
pins2lts-seq, 0.272: Running dfs search strategy
pins2lts-seq, 0.272: Using a tree for state storage
pins2lts-seq, 0.272: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.272: POR cycle proviso: stack
pins2lts-seq, 0.291:
pins2lts-seq, 0.291: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality8==true) found at depth 72!
pins2lts-seq, 0.291:
pins2lts-seq, 0.291: exiting now

May 31, 2017 11:45:19 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality9==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.006: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.274: Expression is: (LamportFastMutExCOL7ReachabilityCardinality9 == true )
pins2lts-seq, 0.274: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.274: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.274: State length is 264, there are 536 groups
pins2lts-seq, 0.274: Running dfs search strategy
pins2lts-seq, 0.274: Using a tree for state storage
pins2lts-seq, 0.274: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.274: POR cycle proviso: stack
pins2lts-seq, 0.284:
pins2lts-seq, 0.284: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality9==true) found at depth 41!
pins2lts-seq, 0.284:
pins2lts-seq, 0.284: exiting now

May 31, 2017 11:45:20 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.006: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.273: Expression is: (LamportFastMutExCOL7ReachabilityCardinality10 == true )
pins2lts-seq, 0.273: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.274: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.274: State length is 264, there are 536 groups
pins2lts-seq, 0.274: Running dfs search strategy
pins2lts-seq, 0.274: Using a tree for state storage
pins2lts-seq, 0.274: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.274: POR cycle proviso: stack
pins2lts-seq, 0.334:
pins2lts-seq, 0.334: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality10==true) found at depth 346!
pins2lts-seq, 0.334:
pins2lts-seq, 0.334: exiting now

May 31, 2017 11:45:20 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.005: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.272: Expression is: (LamportFastMutExCOL7ReachabilityCardinality11 == true )
pins2lts-seq, 0.272: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.273: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.273: State length is 264, there are 536 groups
pins2lts-seq, 0.273: Running dfs search strategy
pins2lts-seq, 0.273: Using a tree for state storage
pins2lts-seq, 0.273: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.273: POR cycle proviso: stack
pins2lts-seq, 0.276:
pins2lts-seq, 0.276: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality11==true) found at depth 20!
pins2lts-seq, 0.276:
pins2lts-seq, 0.276: exiting now

May 31, 2017 11:45:20 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
pins2lts-seq, 0.000: Registering PINS so language module
pins2lts-seq, 0.000: Loading model from ./gal.so
pins2lts-seq, 0.000: library has no initializer
pins2lts-seq, 0.000: loading model GAL
pins2lts-seq, 0.005: completed loading model GAL
pins2lts-seq, 0.005: Initializing POR dependencies: labels 552, guards 536
pins2lts-seq, 0.274: Expression is: (LamportFastMutExCOL7ReachabilityCardinality12 == true )
pins2lts-seq, 0.274: Forcing the use of a cycle proviso. For best results use --proviso=color.
pins2lts-seq, 0.275: There are 552 state labels and 1 edge labels
pins2lts-seq, 0.275: State length is 264, there are 536 groups
pins2lts-seq, 0.275: Running dfs search strategy
pins2lts-seq, 0.275: Using a tree for state storage
pins2lts-seq, 0.275: Visible groups: 0 / 536, labels: 1 / 552
pins2lts-seq, 0.275: POR cycle proviso: stack
pins2lts-seq, 0.288:
pins2lts-seq, 0.288: Invariant violation (LamportFastMutExCOL7ReachabilityCardinality12==true) found at depth 123!
pins2lts-seq, 0.288:
pins2lts-seq, 0.288: exiting now

May 31, 2017 11:45:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-1(UNSAT) depth K=2 took 32252 ms
May 31, 2017 11:45:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-2(UNSAT) depth K=2 took 23751 ms
May 31, 2017 11:46:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-7-ReachabilityCardinality-11
May 31, 2017 11:46:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(SAT) depth K=0 took 48096 ms
May 31, 2017 11:46:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-3(UNSAT) depth K=2 took 27089 ms
May 31, 2017 11:46:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-4(UNSAT) depth K=2 took 29380 ms
May 31, 2017 11:47:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-5(UNSAT) depth K=2 took 30718 ms
May 31, 2017 11:47:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-6(UNSAT) depth K=2 took 25435 ms
May 31, 2017 11:48:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-7(UNSAT) depth K=2 took 25861 ms
May 31, 2017 11:48:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-7-ReachabilityCardinality-13
May 31, 2017 11:48:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-7-ReachabilityCardinality-13
May 31, 2017 11:48:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(FALSE) depth K=0 took 143275 ms
May 31, 2017 11:48:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-8(UNSAT) depth K=2 took 27253 ms
May 31, 2017 11:49:06 PM fr.lip6.move.gal.itstools.ProcessController$1 run
WARNING: null
May 31, 2017 11:49:06 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
May 31, 2017 11:49:06 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
LTSmin timed out on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
May 31, 2017 11:49:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-7-ReachabilityCardinality-14
May 31, 2017 11:49:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-7-ReachabilityCardinality-14
May 31, 2017 11:49:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(FALSE) depth K=0 took 37805 ms
May 31, 2017 11:49:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-7-ReachabilityCardinality-15
May 31, 2017 11:49:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-7-ReachabilityCardinality-15
May 31, 2017 11:49:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(TRUE) depth K=0 took 40424 ms
May 31, 2017 11:50:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-9(UNSAT) depth K=2 took 80245 ms
May 31, 2017 11:50:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=2 took 36005 ms
May 31, 2017 11:51:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=2 took 72128 ms
May 31, 2017 11:52:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=2 took 25717 ms
May 31, 2017 11:52:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=2 took 34773 ms
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
LTSmin timed out on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-seq, ./gal.so, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController$1 run
WARNING: null
May 31, 2017 11:52:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController forwardStream
WARNING: Stream closed
May 31, 2017 11:52:51 PM fr.lip6.move.gal.itstools.ProcessController$1 run
WARNING: null

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r040-blw7-149440486400187"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;