Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is DNAwalker-PT-14ringLRLarge, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r030-blw3-149440266500125
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-14ringLRLarge-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1496244191343


Using solver YICES2 to compute partial order matrices.
Built C files in :
/home/mcc/execution
its-ctl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 312 rows 33 cols
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.86088e+09,11.5572,261400,2,18832,5,816605,6,0,483,1.48677e+06,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,0,24.9228,423704,1,0,876,2.34268e+06,614,293,3186,2.62418e+06,606

System contains 0 deadlocks (shown below if less than --print-limit option) !
FORMULA DNAwalker-PT-14ringLRLarge-ReachabilityDeadlock-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Exit code :0
EmptySet

BK_STOP 1496244218752

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
May 31, 2017 3:23:12 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2017 3:23:12 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 93 ms
May 31, 2017 3:23:12 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 33 places.
May 31, 2017 3:23:13 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 312 transitions.
May 31, 2017 3:23:13 PM fr.lip6.move.gal.logic.togal.ToGalTransformer toGal
WARNING: Unknown predicate type in boolean expression fr.lip6.move.gal.logic.impl.DeadlockImpl
May 31, 2017 3:23:13 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property DNAwalker-PT-14ringLRLarge-ReachabilityDeadlock-0 is trivially true : it is verified in initial state.
May 31, 2017 3:23:13 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 120 ms
May 31, 2017 3:23:13 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 16 ms
May 31, 2017 3:23:13 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 13 ms
May 31, 2017 3:23:13 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 33 variables to be positive in 116 ms
May 31, 2017 3:23:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 312 transitions.
May 31, 2017 3:23:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :0/312 took 5 ms. Total solver calls (SAT/UNSAT): 14(0/14)
May 31, 2017 3:23:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :42/312 took 1007 ms. Total solver calls (SAT/UNSAT): 1773(908/865)
May 31, 2017 3:23:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :84/312 took 2012 ms. Total solver calls (SAT/UNSAT): 3565(1850/1715)
May 31, 2017 3:23:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :121/312 took 3023 ms. Total solver calls (SAT/UNSAT): 5378(2813/2565)
May 31, 2017 3:23:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :159/312 took 4026 ms. Total solver calls (SAT/UNSAT): 7197(3766/3431)
May 31, 2017 3:23:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :202/312 took 5037 ms. Total solver calls (SAT/UNSAT): 9023(4733/4290)
May 31, 2017 3:23:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :244/312 took 6045 ms. Total solver calls (SAT/UNSAT): 10849(5694/5155)
May 31, 2017 3:23:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :278/312 took 7076 ms. Total solver calls (SAT/UNSAT): 12748(6682/6066)
May 31, 2017 3:23:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 7844 ms. Total solver calls (SAT/UNSAT): 14161(7436/6725)
May 31, 2017 3:23:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 312 transitions.
May 31, 2017 3:23:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :52/312 took 1000 ms. Total solver calls (SAT/UNSAT): 2202(546/1656)
May 31, 2017 3:23:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :105/312 took 2028 ms. Total solver calls (SAT/UNSAT): 4507(1069/3438)
May 31, 2017 3:23:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :147/312 took 3034 ms. Total solver calls (SAT/UNSAT): 6672(1691/4981)
May 31, 2017 3:23:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :200/312 took 4038 ms. Total solver calls (SAT/UNSAT): 8920(2214/6706)
May 31, 2017 3:23:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :251/312 took 5044 ms. Total solver calls (SAT/UNSAT): 11177(2750/8427)
May 31, 2017 3:23:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed :287/312 took 6056 ms. Total solver calls (SAT/UNSAT): 13344(3433/9911)
May 31, 2017 3:23:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 6435 ms. Total solver calls (SAT/UNSAT): 14161(3701/10460)
May 31, 2017 3:23:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 312 transitions.
May 31, 2017 3:23:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(9/312) took 1044 ms. Total solver calls (SAT/UNSAT): 3075(3075/0)
May 31, 2017 3:23:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(19/312) took 2060 ms. Total solver calls (SAT/UNSAT): 6050(6050/0)
May 31, 2017 3:23:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(30/312) took 3147 ms. Total solver calls (SAT/UNSAT): 9207(9207/0)
May 31, 2017 3:23:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(41/312) took 4202 ms. Total solver calls (SAT/UNSAT): 12243(12243/0)
May 31, 2017 3:23:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(52/312) took 5203 ms. Total solver calls (SAT/UNSAT): 15158(15158/0)
May 31, 2017 3:23:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(64/312) took 6248 ms. Total solver calls (SAT/UNSAT): 18200(18200/0)
May 31, 2017 3:23:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(77/312) took 7324 ms. Total solver calls (SAT/UNSAT): 21333(21333/0)
May 31, 2017 3:23:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(90/312) took 8340 ms. Total solver calls (SAT/UNSAT): 24297(24297/0)
May 31, 2017 3:23:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of enabling matrix(104/312) took 9372 ms. Total solver calls (SAT/UNSAT): 27300(27300/0)
May 31, 2017 3:23:38 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions tb2, tAb2, tb3, tAb3, tb13, tAb13, tb14, tAb14, tb26, tAb26, tb27, tAb27, t1_2, t1_3, t1_4, t1_5, t1_6, t1_7, t1_8, t1_9, t1_10, t1_12, t1_13, t1_14, t1_15, t1_16, t1_17, t1_18, t1_19, t1_20, t1_21, t1_22, t1_23, t1_25, t1_26, t1_27, t2_3, t2_4, t2_5, t2_6, t2_7, t2_8, t2_9, t2_14, t2_15, t2_16, t2_17, t2_21, t2_22, t2_23, t2_24, t2_25, t2_26, t2_27, t3_2, t3_4, t3_5, t3_6, t3_7, t3_8, t3_16, t3_22, t3_23, t3_24, t3_25, t3_26, t3_27, t4_2, t4_3, t4_5, t4_6, t4_7, t4_8, t4_9, t4_16, t4_25, t4_26, t4_27, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_26, t5_27, t6_2, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_27, t7_2, t7_3, t7_4, t7_5, t7_6, t7_8, t7_9, t7_10, t8_2, t8_3, t8_4, t8_5, t8_6, t8_7, t8_9, t8_10, t8_11, t8_12, t8_16, t10_6, t10_7, t10_8, t10_9, t10_11, t10_12, t10_13, t10_14, t10_15, t10_16, t11_8, t11_9, t11_10, t11_12, t11_13, t11_14, t11_15, t11_16, t12_8, t12_9, t12_10, t12_11, t12_13, t12_14, t12_15, t12_16, t12_17, t13_9, t13_10, t13_11, t13_12, t13_14, t13_15, t13_16, t13_17, t13_18, t14_2, t14_9, t14_10, t14_11, t14_12, t14_13, t14_15, t14_16, t14_17, t14_18, t14_19, t15_2, t15_9, t15_10, t15_11, t15_12, t15_13, t15_14, t15_16, t15_17, t15_18, t15_19, t15_20, t15_21, t16_2, t16_3, t16_4, t16_8, t16_9, t16_10, t16_11, t16_12, t16_13, t16_14, t16_15, t16_17, t16_18, t16_19, t16_20, t16_21, t16_22, t16_27, t17_2, t17_12, t17_13, t17_14, t17_15, t17_16, t17_18, t17_19, t17_20, t17_21, t17_22, t18_13, t18_14, t18_15, t18_16, t18_17, t18_19, t18_20, t18_21, t18_22, t19_14, t19_15, t19_16, t19_17, t19_18, t19_20, t19_21, t19_22, t19_23, t20_15, t20_16, t20_17, t20_18, t20_19, t20_21, t20_22, t20_23, t21_2, t21_15, t21_16, t21_17, t21_18, t21_19, t21_20, t21_22, t21_23, t21_24, t21_25, t23_2, t23_3, t23_19, t23_20, t23_21, t23_22, t23_24, t23_25, t23_26, t23_27, t24_2, t24_3, t24_21, t24_22, t24_23, t24_25, t24_26, t24_27, t25_2, t25_3, t25_4, t25_21, t25_22, t25_23, t25_24, t25_26, t25_27, t26_2, t26_3, t26_4, t26_5, t26_22, t26_23, t26_24, t26_25, t26_27, t27_2, t27_3, t27_4, t27_5, t27_6, t27_16, t27_22, t27_23, t27_24, t27_25, t27_26, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :22/2/288/312

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-14ringLRLarge"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-14ringLRLarge.tgz
mv DNAwalker-PT-14ringLRLarge execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is DNAwalker-PT-14ringLRLarge, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r030-blw3-149440266500125"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;