Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is CircadianClock-PT-001000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r010-csrt-149436129900589
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-0
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-1
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-10
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-11
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-12
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-13
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-14
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-15
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-2
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-3
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-4
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-5
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-6
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-7
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-8
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-9

=== Now, execution of the tool begins

BK_START 1496287349284


its-ctl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.02004e+15,351.83,2421592,2,5017,5,1.38479e+07,6,0,75,1.50464e+07,0


Converting to forward existential form...Done !
original formula: E(!(EG(ma>=1)) U (a>=1 * dr>=1))
=> equivalent forward existential formula: [(FwdU(Init,!(EG(ma>=1))) * (a>=1 * dr>=1))] != FALSE
(forward)formula 0,0,403.731,2421672,1,0,4013,1.38479e+07,26,4006,10333,1.50464e+07,6014
FORMULA CircadianClock-PT-001000-CTLFireability-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((!(r>=1) * (EF((ma>=1 * a_cap>=1)) * (((da_a>=1 * a_cap>=1) * (da>=1 * ma_cap>=1)) * ma>=1))))
=> equivalent forward existential formula: [(FwdU(((FwdU(Init,TRUE) * !(r>=1)) * (((da_a>=1 * a_cap>=1) * (da>=1 * ma_cap>=1)) * ma>=1)),TRUE) * (ma>=1 * a_cap>=1))] != FALSE
(forward)formula 1,0,403.745,2421672,1,0,4016,1.38479e+07,40,4007,10345,1.50464e+07,6016
FORMULA CircadianClock-PT-001000-CTLFireability-1 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AG((E((da>=1 * a>=1) U (dr_a>=1 * a_cap>=1)) + !((((c>=1 * r_cap>=1) * ((a>=1 * r>=1) * c_cap>=1)) * !((dr_a>=1 * a_cap>=1))))))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * !(!((((c>=1 * r_cap>=1) * ((a>=1 * r>=1) * c_cap>=1)) * !((dr_a>=1 * a_cap>=1)))))) * !(E((da>=1 * a>=1) U (dr_a>=1 * a_cap>=1))))] = FALSE
Hit Full ! (commute/partial/dont) 8/6/8
(forward)formula 2,0,404.134,2421672,1,0,4024,1.38479e+07,66,4012,10401,1.50464e+07,6021
FORMULA CircadianClock-PT-001000-CTLFireability-2 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (AX(a>=1) * (AG(EF(ma>=1)) * AX(EF(ma>=1))))
=> equivalent forward existential formula: ([(EY(Init) * !(a>=1))] = FALSE * ([(FwdU(Init,TRUE) * !(E(TRUE U ma>=1)))] = FALSE * [(EY(Init) * !(E(TRUE U ma>=1)))] = FALSE))
(forward)formula 3,0,404.164,2421672,1,0,4026,1.38479e+07,71,4014,10412,1.50464e+07,6023
FORMULA CircadianClock-PT-001000-CTLFireability-3 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (AG(((!((da>=1 * a>=1)) + !((da_a>=1 * a_cap>=1))) * ((dr>=1 * mr_cap>=1) + !((dr>=1 * mr_cap>=1))))) + AX(((da_a>=1 * ma_cap>=1) * r>=1)))
=> equivalent forward existential formula: [(EY((Init * !(!(E(TRUE U !(((!((da>=1 * a>=1)) + !((da_a>=1 * a_cap>=1))) * ((dr>=1 * mr_cap>=1) + !((dr>=1 * mr_cap>=1)))))))))) * !(((da_a>=1 * ma_cap>=1) * r>=1)))] = FALSE
(forward)formula 4,1,404.205,2421672,1,0,4029,1.38479e+07,87,4015,10438,1.50464e+07,6025
FORMULA CircadianClock-PT-001000-CTLFireability-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (E((da>=1 * ma_cap>=1) U (dr_a>=1 * a_cap>=1)) * E(!((ma>=1 * a_cap>=1)) U ((da_a>=1 * ma_cap>=1) * ((a>=1 * dr>=1) + mr>=1))))
=> equivalent forward existential formula: [(FwdU((Init * E((da>=1 * ma_cap>=1) U (dr_a>=1 * a_cap>=1))),!((ma>=1 * a_cap>=1))) * ((da_a>=1 * ma_cap>=1) * ((a>=1 * dr>=1) + mr>=1)))] != FALSE
Hit Full ! (commute/partial/dont) 11/4/5
Hit Full ! (commute/partial/dont) 6/0/10
(forward)formula 5,0,412.799,2421672,1,0,4036,1.38479e+07,104,4019,10483,1.50464e+07,6034
FORMULA CircadianClock-PT-001000-CTLFireability-5 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (mr>=1 + !(EF(AG((c>=1 * r_cap>=1)))))
=> equivalent forward existential formula: [(FwdU((Init * !(mr>=1)),TRUE) * !(E(TRUE U !((c>=1 * r_cap>=1)))))] = FALSE
(forward)formula 6,1,450.413,2421672,1,0,4037,1.38479e+07,105,4019,10486,1.50464e+07,6037
FORMULA CircadianClock-PT-001000-CTLFireability-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(!(AG(r>=1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(r>=1))))] = FALSE
(forward)formula 7,1,456.801,2421672,1,0,4038,1.38479e+07,106,4019,10486,1.50464e+07,6040
FORMULA CircadianClock-PT-001000-CTLFireability-7 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: !(EF(AG((mr>=1 * r_cap>=1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !((mr>=1 * r_cap>=1)))))] = FALSE
(forward)formula 8,1,587.611,2675852,1,0,4039,1.38479e+07,10,4019,10226,1.59242e+07,2
FORMULA CircadianClock-PT-001000-CTLFireability-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF(AG(((mr>=1 + (ma>=1 * a_cap>=1)) + (mr>=1 * (dr_a>=1 * mr_cap>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(((mr>=1 + (ma>=1 * a_cap>=1)) + (mr>=1 * (dr_a>=1 * mr_cap>=1)))))))] != FALSE
(forward)formula 9,0,611.162,2675852,1,0,4039,1.38479e+07,24,4019,10242,1.59242e+07,5
FORMULA CircadianClock-PT-001000-CTLFireability-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(!(EG(mr>=1)) U AG((dr_a>=1 * mr_cap>=1)))
=> equivalent forward existential formula: [(FwdU(Init,!(EG(mr>=1))) * !(E(TRUE U !((dr_a>=1 * mr_cap>=1)))))] != FALSE
(forward)formula 10,0,611.193,2675852,1,0,4039,1.38479e+07,25,4019,10242,1.59242e+07,8
FORMULA CircadianClock-PT-001000-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((EF(((da_a>=1 * a_cap>=1) * ma>=1)) * (!((ma>=1 + r>=1)) * AG((a>=1 * dr>=1)))))
=> equivalent forward existential formula: [(((FwdU(Init,TRUE) * E(TRUE U ((da_a>=1 * a_cap>=1) * ma>=1))) * !((ma>=1 + r>=1))) * !(E(TRUE U !((a>=1 * dr>=1)))))] != FALSE
(forward)formula 11,0,612.842,2675852,1,0,4039,1.38479e+07,30,4019,10247,1.59242e+07,11
FORMULA CircadianClock-PT-001000-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF(AG(AG(a>=1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(!(E(TRUE U !(a>=1)))))))] != FALSE
(forward)formula 12,0,612.863,2675852,1,0,4039,1.38479e+07,31,4019,10247,1.59242e+07,16
FORMULA CircadianClock-PT-001000-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AG(EF((c>=1 * r_cap>=1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (c>=1 * r_cap>=1))))] = FALSE
(forward)formula 13,1,612.989,2675852,1,0,4039,1.38479e+07,35,4019,10249,1.59242e+07,19
FORMULA CircadianClock-PT-001000-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EX((!((!((c>=1 * r_cap>=1)) * mr>=1)) + (AX((ma>=1 * a_cap>=1)) + (((da_a>=1 * ma_cap>=1) + (da>=1 * ma_cap>=1)) + ((c>=1 * r_cap>=1) * (da_a>=1 * a_cap>=1))))))
=> equivalent forward existential formula: ([(EY(Init) * !((!((c>=1 * r_cap>=1)) * mr>=1)))] != FALSE + ([(EY(Init) * !(EX(!((ma>=1 * a_cap>=1)))))] != FALSE + [(EY(Init) * (((da_a>=1 * ma_cap>=1) + (da>=1 * ma_cap>=1)) + ((c>=1 * r_cap>=1) * (da_a>=1 * a_cap>=1))))] != FALSE))
(forward)formula 14,1,613.007,2675852,1,0,4039,1.38479e+07,39,4019,10273,1.59242e+07,21
FORMULA CircadianClock-PT-001000-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (dr_a>=1 * a_cap>=1)
=> equivalent forward existential formula: [(Init * (dr_a>=1 * a_cap>=1))] != FALSE
(forward)formula 15,0,613.007,2675852,1,0,4039,1.38479e+07,41,4019,10275,1.59242e+07,22
FORMULA CircadianClock-PT-001000-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Exit code :0

BK_STOP 1496287965370

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination CTLFireability -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 01, 2017 3:22:30 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2017 3:22:30 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 32 ms
Jun 01, 2017 3:22:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
Jun 01, 2017 3:22:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16 transitions.
Jun 01, 2017 3:22:31 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 18 ms
Jun 01, 2017 3:22:31 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 7 ms
Jun 01, 2017 3:22:31 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms
Jun 01, 2017 3:32:45 AM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
fixpoint of localApply rewriting as localApply of fixpoint

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-001000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-001000.tgz
mv CircadianClock-PT-001000 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is CircadianClock-PT-001000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r010-csrt-149436129900589"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;