Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is Angiogenesis-PT-01, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r010-csrt-149436129300115
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-0
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-1
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-10
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-11
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-12
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-13
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-14
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-15
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-2
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-3
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-4
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-5
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-6
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-7
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-8
FORMULA_NAME Angiogenesis-PT-01-ReachabilityCardinality-9

=== Now, execution of the tool begins

BK_START 1496247083539

FORMULA Angiogenesis-PT-01-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-8 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-7 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-6 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-5 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-4 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-1 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver YICES2 to compute partial order matrices.

Built C files in :
/home/mcc/execution
its-reach command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis\_PT\_01\_flat\_flat,110,0.028615,5612,2,284,5,1209,6,0,220,974,0
Total reachable state count : 110

Verifying 7 reachability properties.
Invariant property Angiogenesis-PT-01-ReachabilityCardinality-0 is true.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-0,0,0.029541,5680,1,0,5,1209,7,0,226,974,0
Invariant property Angiogenesis-PT-01-ReachabilityCardinality-2 is true.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-2 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-2,0,0.031014,5792,1,0,5,1209,8,0,231,974,0
Reachability property Angiogenesis-PT-01-ReachabilityCardinality-3 is true.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-3 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-3,40,0.031429,6012,2,136,6,1209,9,0,235,974,0
Invariant property Angiogenesis-PT-01-ReachabilityCardinality-9 does not hold.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-9,1,0.032032,6012,2,40,7,1209,10,0,243,974,0
Reachability property Angiogenesis-PT-01-ReachabilityCardinality-11 does not hold.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Angiogenesis-PT-01-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-11,0,0.032269,6012,1,0,7,1209,11,0,244,974,0
Reachability property Angiogenesis-PT-01-ReachabilityCardinality-12 is true.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-12,3,0.032532,6012,2,55,8,1209,12,0,248,974,0
Invariant property Angiogenesis-PT-01-ReachabilityCardinality-15 is true.
FORMULA Angiogenesis-PT-01-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Angiogenesis-PT-01-ReachabilityCardinality-15,0,0.033233,6012,1,0,8,1209,13,0,255,974,0
Exit code :0

BK_STOP 1496247086295

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityCardinality -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
May 31, 2017 4:11:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2017 4:11:25 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 57 ms
May 31, 2017 4:11:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 39 places.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 64 transitions.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-1 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-4 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property Angiogenesis-PT-01-ReachabilityCardinality-5 is trivially false : it is not verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-6 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property Angiogenesis-PT-01-ReachabilityCardinality-7 is trivially false : it is not verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-8 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-10 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-13 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property Angiogenesis-PT-01-ReachabilityCardinality-14 is trivially true : it is verified in initial state.
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 84 ms
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 22 ms
May 31, 2017 4:11:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 20 ms
May 31, 2017 4:11:25 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 0 ms
May 31, 2017 4:11:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 19 ms
May 31, 2017 4:11:25 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
Read property : Angiogenesis-PT-01-ReachabilityCardinality-0 with value :((KdStarGStarP3kStarP2>=1)||((!(KdStarGStarPg>=3))||(Pg<=KdStarGStarP3kP3)))
Read property : Angiogenesis-PT-01-ReachabilityCardinality-2 with value :(!(((KdStarGStarP3>=3)||(KdStarGP3>=1))&&((Pten>=1)||(DAGE>=3))))
Read property : Angiogenesis-PT-01-ReachabilityCardinality-3 with value :(Gab1<=GStarPgP3)
Read property : Angiogenesis-PT-01-ReachabilityCardinality-9 with value :(!((!(KdStarPgStarP2<=KdStarGStarP3kStar))||(P3k>=3)))
Read property : Angiogenesis-PT-01-ReachabilityCardinality-11 with value :(DAG>=3)
Read property : Angiogenesis-PT-01-ReachabilityCardinality-12 with value :(KdStar<=KdStarGP3)
Read property : Angiogenesis-PT-01-ReachabilityCardinality-15 with value :((GP3<=KdStarGStarP3)||((KdStarGStarP3kStarP3P2<=KdStarGP3)||((Pg>=1)||(KdStarGP3>=3))))

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-01"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-01.tgz
mv Angiogenesis-PT-01 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is Angiogenesis-PT-01, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r010-csrt-149436129300115"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;