fond
Model Checking Contest @ Petri Nets 2016
6th edition, Toruń, Poland, June 21, 2016
Execution%20of%20r181kn-smll-146444111300519
Last Updated
June 30, 2016

About the Execution of ITS-Tools for S_SafeBus-COL-03

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2412.710 606668.00 618554.00 2260.30 FFFFTFFFTTFFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-2979
Executing tool itstools
Input is S_SafeBus-COL-03, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r181kn-smll-146444111300519
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-03-LTLFireability-0
FORMULA_NAME SafeBus-COL-03-LTLFireability-1
FORMULA_NAME SafeBus-COL-03-LTLFireability-10
FORMULA_NAME SafeBus-COL-03-LTLFireability-11
FORMULA_NAME SafeBus-COL-03-LTLFireability-12
FORMULA_NAME SafeBus-COL-03-LTLFireability-13
FORMULA_NAME SafeBus-COL-03-LTLFireability-14
FORMULA_NAME SafeBus-COL-03-LTLFireability-15
FORMULA_NAME SafeBus-COL-03-LTLFireability-2
FORMULA_NAME SafeBus-COL-03-LTLFireability-3
FORMULA_NAME SafeBus-COL-03-LTLFireability-4
FORMULA_NAME SafeBus-COL-03-LTLFireability-5
FORMULA_NAME SafeBus-COL-03-LTLFireability-6
FORMULA_NAME SafeBus-COL-03-LTLFireability-7
FORMULA_NAME SafeBus-COL-03-LTLFireability-8
FORMULA_NAME SafeBus-COL-03-LTLFireability-9

=== Now, execution of the tool begins

BK_START 1464563846472


its-ltl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201605191313/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(((((("It0.cable_used_0>=1")&&("It0.FMC_0>=1"))||(("It1.cable_used_1>=1")&&("It1.FMC_1>=1")))||(("It2.cable_used_2>=1")&&("It2.FMC_2>=1")))U(((((((((("It0.Cpt1_0>=1")&&("It0.listen_0>=1"))||(("It0.Cpt1_0>=1")&&("It1.listen_1>=1")))||(("It0.Cpt1_0>=1")&&("It2.listen_2>=1")))||(("It1.Cpt1_1>=1")&&("It0.listen_0>=1")))||(("It1.Cpt1_1>=1")&&("It1.listen_1>=1")))||(("It1.Cpt1_1>=1")&&("It2.listen_2>=1")))||(("It2.Cpt1_2>=1")&&("It0.listen_0>=1")))||(("It2.Cpt1_2>=1")&&("It1.listen_1>=1")))||(("It2.Cpt1_2>=1")&&("It2.listen_2>=1"))))U((((("It0.listen_0>=1")&&("It0.MSG_0>=1"))||(("It1.listen_1>=1")&&("It1.MSG_1>=1")))||(("It2.listen_2>=1")&&("It2.MSG_2>=1")))U(((("It0.RMC_0>=1")&&("It0.wait_cable_0>=1"))||(("It1.RMC_1>=1")&&("It1.wait_cable_1>=1")))||(("It2.RMC_2>=1")&&("It2.wait_cable_2>=1")))))))
Formula 0 simplified : !G(((("It0.FMC_0>=1" & "It0.cable_used_0>=1") | ("It1.FMC_1>=1" & "It1.cable_used_1>=1") | ("It2.FMC_2>=1" & "It2.cable_used_2>=1")) U (("It0.Cpt1_0>=1" & "It0.listen_0>=1") | ("It0.Cpt1_0>=1" & "It1.listen_1>=1") | ("It0.Cpt1_0>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It1.Cpt1_1>=1") | ("It1.Cpt1_1>=1" & "It1.listen_1>=1") | ("It1.Cpt1_1>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It2.Cpt1_2>=1") | ("It1.listen_1>=1" & "It2.Cpt1_2>=1") | ("It2.Cpt1_2>=1" & "It2.listen_2>=1"))) U ((("It0.MSG_0>=1" & "It0.listen_0>=1") | ("It1.MSG_1>=1" & "It1.listen_1>=1") | ("It2.MSG_2>=1" & "It2.listen_2>=1")) U (("It0.RMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.RMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.RMC_2>=1" & "It2.wait_cable_2>=1"))))
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
286 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,561.315,195652,1,0,129750,18102,1303,104128,258,107103,349335
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(G(G((("R_tout.R_tout[0]>=1")&&("ACK.ACK[0]>=1"))U(((((((((((((((((((((((((((((("It0.cable_used_0>=1")&&("It0.Cpt2_0>=1"))&&("Dom0.AMC_0>=1"))&&("FMCb.FMCb[0]>=1"))||(((("It0.cable_used_0>=1")&&("It0.Cpt2_0>=1"))&&("Dom3.AMC_3>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It0.Cpt2_0>=1"))&&("Dom6.AMC_6>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It0.Cpt2_0>=1"))&&("Dom0.AMC_0>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It0.Cpt2_0>=1"))&&("Dom3.AMC_3>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It0.Cpt2_0>=1"))&&("Dom6.AMC_6>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It0.Cpt2_0>=1"))&&("Dom0.AMC_0>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It0.Cpt2_0>=1"))&&("Dom3.AMC_3>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It0.Cpt2_0>=1"))&&("Dom6.AMC_6>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It1.Cpt2_1>=1"))&&("Dom1.AMC_1>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It1.Cpt2_1>=1"))&&("Dom4.AMC_4>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It1.Cpt2_1>=1"))&&("Dom7.AMC_7>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It1.Cpt2_1>=1"))&&("Dom1.AMC_1>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It1.Cpt2_1>=1"))&&("Dom4.AMC_4>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It1.Cpt2_1>=1"))&&("Dom7.AMC_7>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It1.Cpt2_1>=1"))&&("Dom1.AMC_1>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It1.Cpt2_1>=1"))&&("Dom4.AMC_4>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It1.Cpt2_1>=1"))&&("Dom7.AMC_7>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It2.Cpt2_2>=1"))&&("Dom2.AMC_2>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It2.Cpt2_2>=1"))&&("Dom5.AMC_5>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It0.cable_used_0>=1")&&("It2.Cpt2_2>=1"))&&("Dom8.AMC_8>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It2.Cpt2_2>=1"))&&("Dom2.AMC_2>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It2.Cpt2_2>=1"))&&("Dom5.AMC_5>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It1.cable_used_1>=1")&&("It2.Cpt2_2>=1"))&&("Dom8.AMC_8>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It2.Cpt2_2>=1"))&&("Dom2.AMC_2>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It2.Cpt2_2>=1"))&&("Dom5.AMC_5>=1"))&&("FMCb.FMCb[0]>=1")))||(((("It2.cable_used_2>=1")&&("It2.Cpt2_2>=1"))&&("Dom8.AMC_8>=1"))&&("FMCb.FMCb[0]>=1"))))))))
Formula 1 simplified : !G(("ACK.ACK[0]>=1" & "R_tout.R_tout[0]>=1") U (("Dom0.AMC_0>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It0.cable_used_0>=1") | ("Dom3.AMC_3>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It0.cable_used_0>=1") | ("Dom6.AMC_6>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It0.cable_used_0>=1") | ("Dom0.AMC_0>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It1.cable_used_1>=1") | ("Dom3.AMC_3>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It1.cable_used_1>=1") | ("Dom6.AMC_6>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It1.cable_used_1>=1") | ("Dom0.AMC_0>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It2.cable_used_2>=1") | ("Dom3.AMC_3>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It2.cable_used_2>=1") | ("Dom6.AMC_6>=1" & "FMCb.FMCb[0]>=1" & "It0.Cpt2_0>=1" & "It2.cable_used_2>=1") | ("Dom1.AMC_1>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It1.Cpt2_1>=1") | ("Dom4.AMC_4>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It1.Cpt2_1>=1") | ("Dom7.AMC_7>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It1.Cpt2_1>=1") | ("Dom1.AMC_1>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It1.cable_used_1>=1") | ("Dom4.AMC_4>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It1.cable_used_1>=1") | ("Dom7.AMC_7>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It1.cable_used_1>=1") | ("Dom1.AMC_1>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It2.cable_used_2>=1") | ("Dom4.AMC_4>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It2.cable_used_2>=1") | ("Dom7.AMC_7>=1" & "FMCb.FMCb[0]>=1" & "It1.Cpt2_1>=1" & "It2.cable_used_2>=1") | ("Dom2.AMC_2>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It2.Cpt2_2>=1") | ("Dom5.AMC_5>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It2.Cpt2_2>=1") | ("Dom8.AMC_8>=1" & "FMCb.FMCb[0]>=1" & "It0.cable_used_0>=1" & "It2.Cpt2_2>=1") | ("Dom2.AMC_2>=1" & "FMCb.FMCb[0]>=1" & "It1.cable_used_1>=1" & "It2.Cpt2_2>=1") | ("Dom5.AMC_5>=1" & "FMCb.FMCb[0]>=1" & "It1.cable_used_1>=1" & "It2.Cpt2_2>=1") | ("Dom8.AMC_8>=1" & "FMCb.FMCb[0]>=1" & "It1.cable_used_1>=1" & "It2.Cpt2_2>=1") | ("Dom2.AMC_2>=1" & "FMCb.FMCb[0]>=1" & "It2.Cpt2_2>=1" & "It2.cable_used_2>=1") | ("Dom5.AMC_5>=1" & "FMCb.FMCb[0]>=1" & "It2.Cpt2_2>=1" & "It2.cable_used_2>=1") | ("Dom8.AMC_8>=1" & "FMCb.FMCb[0]>=1" & "It2.Cpt2_2>=1" & "It2.cable_used_2>=1")))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
35 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.134,203996,1,0,146546,18136,1553,117291,259,111109,389857
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-1 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F(((((("It0.wait_cable_0>=1")&&("It0.PMC_0>=1"))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1")))))
Formula 2 simplified : !F(("It0.PMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.PMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.PMC_2>=1" & "It2.wait_cable_2>=1"))
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.143,204492,1,0,147184,18136,1598,117546,263,111109,392712
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-2 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(((("It0.MSG_0>=1")&&("R_tout.R_tout[0]>=1"))||(("It1.MSG_1>=1")&&("R_tout.R_tout[0]>=1")))||(("It2.MSG_2>=1")&&("R_tout.R_tout[0]>=1")))))
Formula 3 simplified : !F(("It0.MSG_0>=1" & "R_tout.R_tout[0]>=1") | ("It1.MSG_1>=1" & "R_tout.R_tout[0]>=1") | ("It2.MSG_2>=1" & "R_tout.R_tout[0]>=1"))
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.178,205868,1,0,150287,18136,1617,118897,263,111119,401581
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-3 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((((("It0.MSG_0>=1")&&("R_tout.R_tout[0]>=1"))||(("It1.MSG_1>=1")&&("R_tout.R_tout[0]>=1")))||(("It2.MSG_2>=1")&&("R_tout.R_tout[0]>=1"))))
Formula 4 simplified : !(("It0.MSG_0>=1" & "R_tout.R_tout[0]>=1") | ("It1.MSG_1>=1" & "R_tout.R_tout[0]>=1") | ("It2.MSG_2>=1" & "R_tout.R_tout[0]>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.179,206128,1,0,150287,18136,1617,118897,263,111119,401581
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-4 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((((("It0.listen_0>=1")&&("It0.MSG_0>=1"))||(("It1.listen_1>=1")&&("It1.MSG_1>=1")))||(("It2.listen_2>=1")&&("It2.MSG_2>=1"))))
Formula 5 simplified : !(("It0.MSG_0>=1" & "It0.listen_0>=1") | ("It1.MSG_1>=1" & "It1.listen_1>=1") | ("It2.MSG_2>=1" & "It2.listen_2>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.181,206132,1,0,150287,18136,1643,118897,266,111119,401608
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-5 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(((((("It0.cable_used_0>=1")&&("It0.FMC_0>=1"))||(("It1.cable_used_1>=1")&&("It1.FMC_1>=1")))||(("It2.cable_used_2>=1")&&("It2.FMC_2>=1")))U(F((((("It0.RMC_0>=1")&&("It0.wait_cable_0>=1"))||(("It1.RMC_1>=1")&&("It1.wait_cable_1>=1")))||(("It2.RMC_2>=1")&&("It2.wait_cable_2>=1")))U(("R_tout.R_tout[0]>=1")&&("ACK.ACK[0]>=1"))))))
Formula 6 simplified : !((("It0.FMC_0>=1" & "It0.cable_used_0>=1") | ("It1.FMC_1>=1" & "It1.cable_used_1>=1") | ("It2.FMC_2>=1" & "It2.cable_used_2>=1")) U F((("It0.RMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.RMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.RMC_2>=1" & "It2.wait_cable_2>=1")) U ("ACK.ACK[0]>=1" & "R_tout.R_tout[0]>=1")))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
36 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.545,212016,1,0,162322,18144,1671,128364,266,111486,430695
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-6 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((((("It0.RMC_0>=1")&&("It0.wait_cable_0>=1"))||(("It1.RMC_1>=1")&&("It1.wait_cable_1>=1")))||(("It2.RMC_2>=1")&&("It2.wait_cable_2>=1"))))
Formula 7 simplified : !(("It0.RMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.RMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.RMC_2>=1" & "It2.wait_cable_2>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,596.546,212284,1,0,162322,18144,1672,128364,266,111486,430722
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-7 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((G(F(G(((("It0.listen_0>=1")&&("It0.MSG_0>=1"))||(("It1.listen_1>=1")&&("It1.MSG_1>=1")))||(("It2.listen_2>=1")&&("It2.MSG_2>=1")))))))
Formula 8 simplified : !GFG(("It0.MSG_0>=1" & "It0.listen_0>=1") | ("It1.MSG_1>=1" & "It1.listen_1>=1") | ("It2.MSG_2>=1" & "It2.listen_2>=1"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
104 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,597.586,237000,1,0,210664,18158,1707,161512,268,114960,541538
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-8 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !(((F(F(X(((((((((("It0.Cpt1_0>=1")&&("It0.listen_0>=1"))||(("It0.Cpt1_0>=1")&&("It1.listen_1>=1")))||(("It0.Cpt1_0>=1")&&("It2.listen_2>=1")))||(("It1.Cpt1_1>=1")&&("It0.listen_0>=1")))||(("It1.Cpt1_1>=1")&&("It1.listen_1>=1")))||(("It1.Cpt1_1>=1")&&("It2.listen_2>=1")))||(("It2.Cpt1_2>=1")&&("It0.listen_0>=1")))||(("It2.Cpt1_2>=1")&&("It1.listen_1>=1")))||(("It2.Cpt1_2>=1")&&("It2.listen_2>=1"))))))U(((("It0.MSG_0>=1")&&("R_tout.R_tout[0]>=1"))||(("It1.MSG_1>=1")&&("R_tout.R_tout[0]>=1")))||(("It2.MSG_2>=1")&&("R_tout.R_tout[0]>=1")))))
Formula 9 simplified : !(FX(("It0.Cpt1_0>=1" & "It0.listen_0>=1") | ("It0.Cpt1_0>=1" & "It1.listen_1>=1") | ("It0.Cpt1_0>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It1.Cpt1_1>=1") | ("It1.Cpt1_1>=1" & "It1.listen_1>=1") | ("It1.Cpt1_1>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It2.Cpt1_2>=1") | ("It1.listen_1>=1" & "It2.Cpt1_2>=1") | ("It2.Cpt1_2>=1" & "It2.listen_2>=1")) U (("It0.MSG_0>=1" & "R_tout.R_tout[0]>=1") | ("It1.MSG_1>=1" & "R_tout.R_tout[0]>=1") | ("It2.MSG_2>=1" & "R_tout.R_tout[0]>=1")))
19 unique states visited
0 strongly connected components in search stack
18 transitions explored
10 items max in DFS search stack
27 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,597.869,247180,1,0,234374,18181,1746,174800,268,115177,618553
no accepting run found
Formula 9 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-9 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((((("It0.cable_used_0>=1")&&("It0.FMC_0>=1"))||(("It1.cable_used_1>=1")&&("It1.FMC_1>=1")))||(("It2.cable_used_2>=1")&&("It2.FMC_2>=1"))))
Formula 10 simplified : !(("It0.FMC_0>=1" & "It0.cable_used_0>=1") | ("It1.FMC_1>=1" & "It1.cable_used_1>=1") | ("It2.FMC_2>=1" & "It2.cable_used_2>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,597.871,247440,1,0,234374,18181,1767,174800,269,115177,618580
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((X(F(F(G(((("It0.MSG_0>=1")&&("R_tout.R_tout[0]>=1"))||(("It1.MSG_1>=1")&&("R_tout.R_tout[0]>=1")))||(("It2.MSG_2>=1")&&("R_tout.R_tout[0]>=1"))))))))
Formula 11 simplified : !XFG(("It0.MSG_0>=1" & "R_tout.R_tout[0]>=1") | ("It1.MSG_1>=1" & "R_tout.R_tout[0]>=1") | ("It2.MSG_2>=1" & "R_tout.R_tout[0]>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
76 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,598.639,266048,1,0,270895,18196,1791,200077,269,117558,699889
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((F(((("It0.MSG_0>=1")&&("R_tout.R_tout[0]>=1"))||(("It1.MSG_1>=1")&&("R_tout.R_tout[0]>=1")))||(("It2.MSG_2>=1")&&("R_tout.R_tout[0]>=1")))))
Formula 12 simplified : !F(("It0.MSG_0>=1" & "R_tout.R_tout[0]>=1") | ("It1.MSG_1>=1" & "R_tout.R_tout[0]>=1") | ("It2.MSG_2>=1" & "R_tout.R_tout[0]>=1"))
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,598.64,266308,1,0,270895,18196,1791,200077,269,117558,699889
no accepting run found
Formula 12 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !((G(((("It0.MSG_0>=1")&&("It0.wait_msg_0>=1"))||(("It1.MSG_1>=1")&&("It1.wait_msg_1>=1")))||(("It2.MSG_2>=1")&&("It2.wait_msg_2>=1")))))
Formula 13 simplified : !G(("It0.MSG_0>=1" & "It0.wait_msg_0>=1") | ("It1.MSG_1>=1" & "It1.wait_msg_1>=1") | ("It2.MSG_2>=1" & "It2.wait_msg_2>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,598.643,266312,1,0,270895,18196,1853,200077,275,117558,699953
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !((((((("It0.wait_cable_0>=1")&&("It0.PMC_0>=1"))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1"))))
Formula 14 simplified : !(("It0.PMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.PMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.PMC_2>=1" & "It2.wait_cable_2>=1"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,598.644,266328,1,0,270895,18196,1853,200077,275,117558,699954
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((G(((((((((((("It0.Cpt1_0>=1")&&("It0.listen_0>=1"))||(("It0.Cpt1_0>=1")&&("It1.listen_1>=1")))||(("It0.Cpt1_0>=1")&&("It2.listen_2>=1")))||(("It1.Cpt1_1>=1")&&("It0.listen_0>=1")))||(("It1.Cpt1_1>=1")&&("It1.listen_1>=1")))||(("It1.Cpt1_1>=1")&&("It2.listen_2>=1")))||(("It2.Cpt1_2>=1")&&("It0.listen_0>=1")))||(("It2.Cpt1_2>=1")&&("It1.listen_1>=1")))||(("It2.Cpt1_2>=1")&&("It2.listen_2>=1")))U(((((("It0.wait_cable_0>=1")&&("It0.PMC_0>=1"))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It1.wait_cable_1>=1")&&("It1.PMC_1>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1")))||(("It2.wait_cable_2>=1")&&("It2.PMC_2>=1"))))U(F(((("It0.listen_0>=1")&&("It0.MSG_0>=1"))||(("It1.listen_1>=1")&&("It1.MSG_1>=1")))||(("It2.listen_2>=1")&&("It2.MSG_2>=1")))))))
Formula 15 simplified : !G(((("It0.Cpt1_0>=1" & "It0.listen_0>=1") | ("It0.Cpt1_0>=1" & "It1.listen_1>=1") | ("It0.Cpt1_0>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It1.Cpt1_1>=1") | ("It1.Cpt1_1>=1" & "It1.listen_1>=1") | ("It1.Cpt1_1>=1" & "It2.listen_2>=1") | ("It0.listen_0>=1" & "It2.Cpt1_2>=1") | ("It1.listen_1>=1" & "It2.Cpt1_2>=1") | ("It2.Cpt1_2>=1" & "It2.listen_2>=1")) U (("It0.PMC_0>=1" & "It0.wait_cable_0>=1") | ("It1.PMC_1>=1" & "It1.wait_cable_1>=1") | ("It2.PMC_2>=1" & "It2.wait_cable_2>=1"))) U F(("It0.MSG_0>=1" & "It0.listen_0>=1") | ("It1.MSG_1>=1" & "It1.listen_1>=1") | ("It2.MSG_2>=1" & "It2.listen_2>=1")))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
14 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,599.447,279388,1,0,276150,18205,1903,204113,275,117814,713588
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

BK_STOP 1464564453140

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -XX:MaxPermSize=512m -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its
Java HotSpot(TM) 64-Bit Server VM warning: ignoring option MaxPermSize=512m; support was removed in 8.0
May 29, 2016 11:17:30 PM fr.lip6.move.gal.application.Application transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2016 11:17:30 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1568 ms
May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: read order :VarOrder [vars=[Cpt2[0], Cpt2[1], Cpt2[2], Cpt1[0], Cpt1[1], Cpt1[2], msgl[0], msgl[1], msgl[2], cable_free[0], cable_used[0], cable_used[1], cable_used[2], FMC[0], FMC[1], FMC[2], AMC[0], AMC[1], AMC[2], AMC[3], AMC[4], AMC[5], AMC[6], AMC[7], AMC[8], wait_ack[0], wait_ack[1], wait_ack[2], wait_ack[3], wait_ack[4], wait_ack[5], wait_ack[6], wait_ack[7], wait_ack[8], wait_cable[0], wait_cable[1], wait_cable[2], listen[0], listen[1], listen[2], RMC[0], RMC[1], RMC[2], ACK[0], PMC[0], PMC[1], PMC[2], MSG[0], MSG[1], MSG[2], T_out[0], R_tout[0], S_tout[0], wait_msg[0], wait_msg[1], wait_msg[2], FMCb[0], loop_em[0], loop_em[1], loop_em[2]]]
May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 29, 2016 11:17:31 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains : CompositeGalOrder [children=[VarOrder [vars=[AMC[0], wait_ack[0]]], VarOrder [vars=[AMC[1], wait_ack[1]]], VarOrder [vars=[AMC[2], wait_ack[2]]], VarOrder [vars=[AMC[3], wait_ack[3]]], VarOrder [vars=[AMC[4], wait_ack[4]]], VarOrder [vars=[AMC[5], wait_ack[5]]], VarOrder [vars=[AMC[6], wait_ack[6]]], VarOrder [vars=[AMC[7], wait_ack[7]]], VarOrder [vars=[AMC[8], wait_ack[8]]], VarOrder [vars=[cable_free[0]]], VarOrder [vars=[ACK[0]]], VarOrder [vars=[T_out[0]]], VarOrder [vars=[R_tout[0]]], VarOrder [vars=[S_tout[0]]], VarOrder [vars=[FMCb[0]]], VarOrder [vars=[Cpt2[0], Cpt1[0], msgl[0], cable_used[0], FMC[0], wait_cable[0], listen[0], RMC[0], PMC[0], MSG[0], wait_msg[0], loop_em[0]]], VarOrder [vars=[Cpt2[1], Cpt1[1], msgl[1], cable_used[1], FMC[1], wait_cable[1], listen[1], RMC[1], PMC[1], MSG[1], wait_msg[1], loop_em[1]]], VarOrder [vars=[Cpt2[2], Cpt1[2], msgl[2], cable_used[2], FMC[2], wait_cable[2], listen[2], RMC[2], PMC[2], MSG[2], wait_msg[2], loop_em[2]]]]]
May 29, 2016 11:17:31 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 3 instantiations of transitions. Total transitions/syncs built is 112
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 60 variables) in GAL type Document
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Found a total of 3 constant array cells/variables (out of 60 variables) in type Document
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: msgl[0],msgl[1],msgl[2],
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 21 expressions due to constant valuations.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 137 ms
May 29, 2016 11:17:32 PM fr.lip6.move.gal.application.Application applyOrder
INFO: Applying decomposition
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 52 ms
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Partition obtained :[AMC[0], wait_ack[0], ],[AMC[1], wait_ack[1], ],[AMC[2], wait_ack[2], ],[AMC[3], wait_ack[3], ],[AMC[4], wait_ack[4], ],[AMC[5], wait_ack[5], ],[AMC[6], wait_ack[6], ],[AMC[7], wait_ack[7], ],[AMC[8], wait_ack[8], ],[cable_free[0], ],[ACK[0], ],[T_out[0], ],[R_tout[0], ],[S_tout[0], ],[FMCb[0], ],[Cpt2[0], Cpt1[0], cable_used[0], FMC[0], wait_cable[0], listen[0], RMC[0], PMC[0], MSG[0], wait_msg[0], loop_em[0], ],[Cpt2[1], Cpt1[1], cable_used[1], FMC[1], wait_cable[1], listen[1], RMC[1], PMC[1], MSG[1], wait_msg[1], loop_em[1], ],[Cpt2[2], Cpt1[2], cable_used[2], FMC[2], wait_cable[2], listen[2], RMC[2], PMC[2], MSG[2], wait_msg[2], loop_em[2], ],

May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array Cpt2 to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array Cpt1 to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array cable_used to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array FMC to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array AMC to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array wait_ack to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array wait_cable to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array listen to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array RMC to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array PMC to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array MSG to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array wait_msg to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting array loop_em to variables to allow decomposition.
May 29, 2016 11:17:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 96 redundant transitions.
May 29, 2016 11:17:32 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.gal : 13 ms
May 29, 2016 11:17:32 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 4 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_SafeBus-COL-03"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_SafeBus-COL-03.tgz
mv S_SafeBus-COL-03 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2979"
echo " Executing tool itstools"
echo " Input is S_SafeBus-COL-03, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r181kn-smll-146444111300519"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;