About the Execution of ITS-Tools for PaceMaker-PT-none
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
709.790 | 24811.00 | 29643.00 | 220.90 | FTFFTTTFTTTFTTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-2979
Executing tool itstools
Input is PaceMaker-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r217su-smll-146468018900642
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-0
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-1
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-10
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-11
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-12
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-13
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-14
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-15
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-2
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-3
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-4
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-5
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-6
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-7
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-8
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-9
=== Now, execution of the tool begins
BK_START 1464827496959
its-ctl command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201605191313/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLCardinality.gal -t CGAL -ctl /home/mcc/execution/CTLCardinality.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,0.708786,21960,2,1248,5,78057,6,0,1071,89663,0
Converting to forward existential form...Done !
original formula: (AG(AtrNoiseGenerator<=SIG_VS) + EG(EF(PVARP<=A_AVJ)))
=> equivalent forward existential formula: [(FwdU((Init * !(EG(E(TRUE U PVARP<=A_AVJ)))),TRUE) * !(AtrNoiseGenerator<=SIG_VS))] = FALSE
Checking (exact) 0 :[(FwdU((Init * !(EG(E(TRUE U PVARP<=A_AVJ)))),TRUE) * !(AtrNoiseGenerator<=SIG_VS))] = FALSE
Checking (exact) 0 :(FwdU((Init * !(EG(E(TRUE U PVARP<=A_AVJ)))),TRUE) * !(AtrNoiseGenerator<=SIG_VS))
Checking (exact) 1 :!(AtrNoiseGenerator<=SIG_VS)
Checking (exact) 1 :FwdU((Init * !(EG(E(TRUE U PVARP<=A_AVJ)))),TRUE)
Checking (exact) 1 :(Init * !(EG(E(TRUE U PVARP<=A_AVJ))))
Checking (exact) 1 :!(EG(E(TRUE U PVARP<=A_AVJ)))
Checking (exact) 1 :EG(E(TRUE U PVARP<=A_AVJ))
Checking (exact) 1 :E(TRUE U PVARP<=A_AVJ)
Fast SCC detection found none.
Checking (exact) 1 :Init
(forward)formula 0,0,2.51253,58960,1,0,359,341550,357,168,5909,266511,340
FORMULA PaceMaker-PT-none-CTLCardinality-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: ((AG(SIG_Aget<=VRGEctopic) + (!(URI<=SIG_Clk1) * ((URIState>=3 + A_VRGEctopic<=A_A_dV) * SIG_Clk1>=3))) + SIG_IncrClk>=3)
=> equivalent forward existential formula: [(FwdU(((Init * !(SIG_IncrClk>=3)) * !((!(URI<=SIG_Clk1) * ((URIState>=3 + A_VRGEctopic<=A_A_dV) * SIG_Clk1>=3)))),TRUE) * !(SIG_Aget<=VRGEctopic))] = FALSE
Checking (exact) 0 :[(FwdU(((Init * !(SIG_IncrClk>=3)) * !((!(URI<=SIG_Clk1) * ((URIState>=3 + A_VRGEctopic<=A_A_dV) * SIG_Clk1>=3)))),TRUE) * !(SIG_Aget<=VRGEctopic))] = FALSE
Checking (exact) 0 :(FwdU(((Init * !(SIG_IncrClk>=3)) * !((!(URI<=SIG_Clk1) * ((URIState>=3 + A_VRGEctopic<=A_A_dV) * SIG_Clk1>=3)))),TRUE) * !(SIG_Aget<=VRGEctopic))
(forward)formula 1,1,2.51501,58964,1,0,359,341550,359,168,5915,266514,340
FORMULA PaceMaker-PT-none-CTLCardinality-1 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: ((EX(!(AVJOut<=A_dV)) + AG(SIG_AgetOut<=A_AtrNoiseGenerator)) + (A_dV<=A_SIG_NextVtrBeat * Atrium<=A_AVJ))
=> equivalent forward existential formula: [(FwdU(((Init * !((A_dV<=A_SIG_NextVtrBeat * Atrium<=A_AVJ))) * !(EX(!(AVJOut<=A_dV)))),TRUE) * !(SIG_AgetOut<=A_AtrNoiseGenerator))] = FALSE
Checking (exact) 0 :[(FwdU(((Init * !((A_dV<=A_SIG_NextVtrBeat * Atrium<=A_AVJ))) * !(EX(!(AVJOut<=A_dV)))),TRUE) * !(SIG_AgetOut<=A_AtrNoiseGenerator))] = FALSE
Checking (exact) 0 :(FwdU(((Init * !((A_dV<=A_SIG_NextVtrBeat * Atrium<=A_AVJ))) * !(EX(!(AVJOut<=A_dV)))),TRUE) * !(SIG_AgetOut<=A_AtrNoiseGenerator))
(forward)formula 2,1,2.5159,59092,1,0,359,341550,361,168,5921,266514,340
FORMULA PaceMaker-PT-none-CTLCardinality-2 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: A(EX(SIG_VS<=SIG_APOut) U EF(AVI<=RAConductor))
=> equivalent forward existential formula: [((Init * !(EG(!(E(TRUE U AVI<=RAConductor))))) * !(E(!(E(TRUE U AVI<=RAConductor)) U (!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor))))))] != FALSE
Checking (exact) 0 :[((Init * !(EG(!(E(TRUE U AVI<=RAConductor))))) * !(E(!(E(TRUE U AVI<=RAConductor)) U (!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor))))))] != FALSE
Checking (exact) 0 :((Init * !(EG(!(E(TRUE U AVI<=RAConductor))))) * !(E(!(E(TRUE U AVI<=RAConductor)) U (!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor))))))
Checking (exact) 1 :!(E(!(E(TRUE U AVI<=RAConductor)) U (!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor)))))
Checking (exact) 1 :E(!(E(TRUE U AVI<=RAConductor)) U (!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor))))
Checking (exact) 1 :!(E(TRUE U AVI<=RAConductor))
Checking (exact) 1 :E(TRUE U AVI<=RAConductor)
Checking (exact) 1 :(!(EX(SIG_VS<=SIG_APOut)) * !(E(TRUE U AVI<=RAConductor)))
Checking (exact) 1 :!(E(TRUE U AVI<=RAConductor))
Checking (exact) 1 :E(TRUE U AVI<=RAConductor)
Checking (exact) 1 :!(EX(SIG_VS<=SIG_APOut))
Checking (exact) 1 :EX(SIG_VS<=SIG_APOut)
Checking (exact) 1 :(Init * !(EG(!(E(TRUE U AVI<=RAConductor)))))
Checking (exact) 1 :!(EG(!(E(TRUE U AVI<=RAConductor))))
Checking (exact) 1 :EG(!(E(TRUE U AVI<=RAConductor)))
Checking (exact) 1 :!(E(TRUE U AVI<=RAConductor))
Checking (exact) 1 :E(TRUE U AVI<=RAConductor)
Checking (exact) 1 :Init
(forward)formula 3,1,19.2443,390264,1,0,410,1.9888e+06,368,198,6030,1.95206e+06,407
FORMULA PaceMaker-PT-none-CTLCardinality-3 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: E((!(A_SIG_NextVtrBeat<=A_LRI) * !(VtrNoiseGenerator<=URI)) U AG(SIG_Vget<=A_VRG))
=> equivalent forward existential formula: [(FwdU(Init,(!(A_SIG_NextVtrBeat<=A_LRI) * !(VtrNoiseGenerator<=URI))) * !(E(TRUE U !(SIG_Vget<=A_VRG))))] != FALSE
Checking (exact) 0 :[(FwdU(Init,(!(A_SIG_NextVtrBeat<=A_LRI) * !(VtrNoiseGenerator<=URI))) * !(E(TRUE U !(SIG_Vget<=A_VRG))))] != FALSE
Checking (exact) 0 :(FwdU(Init,(!(A_SIG_NextVtrBeat<=A_LRI) * !(VtrNoiseGenerator<=URI))) * !(E(TRUE U !(SIG_Vget<=A_VRG))))
Checking (exact) 1 :!(E(TRUE U !(SIG_Vget<=A_VRG)))
Checking (exact) 1 :E(TRUE U !(SIG_Vget<=A_VRG))
Checking (exact) 1 :FwdU(Init,(!(A_SIG_NextVtrBeat<=A_LRI) * !(VtrNoiseGenerator<=URI)))
Checking (exact) 1 :Init
Hit Full ! (commute/partial/dont) 138/11/26
(forward)formula 4,1,19.2481,390524,1,0,410,1.9888e+06,382,198,6069,1.95206e+06,411
FORMULA PaceMaker-PT-none-CTLCardinality-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (((!(SIG_Vbeat>=2) * ((RVConductor<=SIG_VS + SIG_VP<=SIG_VS) + !(A_dV>=1))) + SIG_VPOut<=A_SIG_VgetOut) * (E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP) + AF(A_SIG_Vbeat>=2)))
=> equivalent forward existential formula: ([(Init * !(((!(SIG_Vbeat>=2) * ((RVConductor<=SIG_VS + SIG_VP<=SIG_VS) + !(A_dV>=1))) + SIG_VPOut<=A_SIG_VgetOut)))] = FALSE * [FwdG((Init * !(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP))),!(A_SIG_Vbeat>=2))] = FALSE)
Checking (exact) 0 :([(Init * !(((!(SIG_Vbeat>=2) * ((RVConductor<=SIG_VS + SIG_VP<=SIG_VS) + !(A_dV>=1))) + SIG_VPOut<=A_SIG_VgetOut)))] = FALSE * [FwdG((Init * !(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP))),!(A_SIG_Vbeat>=2))] = FALSE)
Checking (exact) 1 :[FwdG((Init * !(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP))),!(A_SIG_Vbeat>=2))] = FALSE
Checking (exact) 0 :FwdG((Init * !(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP))),!(A_SIG_Vbeat>=2))
Checking (exact) 1 :(Init * !(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP)))
Checking (exact) 1 :!(E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP))
Checking (exact) 1 :E(A_SIG_VP<=A_SIG_AP U SANodeEctopic<=A_SIG_AP)
Checking (exact) 1 :Init
(forward)formula 5,0,19.2519,390768,1,0,411,1.9891e+06,390,198,6080,1.95207e+06,415
FORMULA PaceMaker-PT-none-CTLCardinality-5 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: AG(((!(RVConductor>=2) + (A_SIG_AgetOut<=A_Atrium * A_URIState>=1)) * ((Atrium>=3 * A_PVARP>=1) + (SANode<=SIG_Aget + SANode<=A_SIG_NextVtrBeat))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(((!(RVConductor>=2) + (A_SIG_AgetOut<=A_Atrium * A_URIState>=1)) * ((Atrium>=3 * A_PVARP>=1) + (SANode<=SIG_Aget + SANode<=A_SIG_NextVtrBeat)))))] = FALSE
Checking (exact) 0 :[(FwdU(Init,TRUE) * !(((!(RVConductor>=2) + (A_SIG_AgetOut<=A_Atrium * A_URIState>=1)) * ((Atrium>=3 * A_PVARP>=1) + (SANode<=SIG_Aget + SANode<=A_SIG_NextVtrBeat)))))] = FALSE
Checking (exact) 0 :(FwdU(Init,TRUE) * !(((!(RVConductor>=2) + (A_SIG_AgetOut<=A_Atrium * A_URIState>=1)) * ((Atrium>=3 * A_PVARP>=1) + (SANode<=SIG_Aget + SANode<=A_SIG_NextVtrBeat)))))
(forward)formula 6,1,19.2541,390768,1,0,411,1.9891e+06,408,198,6112,1.95207e+06,415
FORMULA PaceMaker-PT-none-CTLCardinality-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor)) * AX(AG(URI>=2)))
=> equivalent forward existential formula: ([(Init * !(E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor))))] = FALSE * [(FwdU(EY(Init),TRUE) * !(URI>=2))] = FALSE)
Checking (exact) 0 :([(Init * !(E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor))))] = FALSE * [(FwdU(EY(Init),TRUE) * !(URI>=2))] = FALSE)
Checking (exact) 1 :[(FwdU(EY(Init),TRUE) * !(URI>=2))] = FALSE
Checking (exact) 0 :(FwdU(EY(Init),TRUE) * !(URI>=2))
Checking (exact) 1 :[(Init * !(E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor))))] = FALSE
Checking (exact) 0 :(Init * !(E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor))))
Checking (exact) 1 :!(E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor)))
Checking (exact) 1 :E((A_SIG_Aget<=Atrium + A_AVJOut>=1) U (A_AtrNoiseGenerator>=2 * URI<=RAConductor))
Checking (exact) 1 :Init
(forward)formula 7,1,19.272,391316,1,0,412,1.9892e+06,417,199,6137,1.95215e+06,419
FORMULA PaceMaker-PT-none-CTLCardinality-7 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EF((!((SIG_Clk1<=A_RVConductor * A_SIG_AS>=1)) + !((A_RVConductor<=VRG + A_SANode>=2))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (!((SIG_Clk1<=A_RVConductor * A_SIG_AS>=1)) + !((A_RVConductor<=VRG + A_SANode>=2))))] != FALSE
Checking (exact) 0 :[(FwdU(Init,TRUE) * (!((SIG_Clk1<=A_RVConductor * A_SIG_AS>=1)) + !((A_RVConductor<=VRG + A_SANode>=2))))] != FALSE
Checking (exact) 0 :(FwdU(Init,TRUE) * (!((SIG_Clk1<=A_RVConductor * A_SIG_AS>=1)) + !((A_RVConductor<=VRG + A_SANode>=2))))
Checking (exact) 1 :(!((SIG_Clk1<=A_RVConductor * A_SIG_AS>=1)) + !((A_RVConductor<=VRG + A_SANode>=2)))
Checking (exact) 1 :FwdU(Init,TRUE)
Checking (exact) 1 :Init
(forward)formula 8,1,19.2778,391576,1,0,413,1.98924e+06,427,200,6156,1.95215e+06,421
FORMULA PaceMaker-PT-none-CTLCardinality-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EG((AG(RAConductor<=A_URI) + ((A_SIG_AP<=SIG_AS * A_SIG_State>=2) * A_RAConductor>=3)))
=> equivalent forward existential formula: [FwdG(Init,(!(E(TRUE U !(RAConductor<=A_URI))) + ((A_SIG_AP<=SIG_AS * A_SIG_State>=2) * A_RAConductor>=3)))] != FALSE
Checking (exact) 0 :[FwdG(Init,(!(E(TRUE U !(RAConductor<=A_URI))) + ((A_SIG_AP<=SIG_AS * A_SIG_State>=2) * A_RAConductor>=3)))] != FALSE
Checking (exact) 0 :FwdG(Init,(!(E(TRUE U !(RAConductor<=A_URI))) + ((A_SIG_AP<=SIG_AS * A_SIG_State>=2) * A_RAConductor>=3)))
Checking (exact) 1 :Init
Checking (exact) 1 :(!(E(TRUE U !(RAConductor<=A_URI))) + ((A_SIG_AP<=SIG_AS * A_SIG_State>=2) * A_RAConductor>=3))
Checking (exact) 1 :!(E(TRUE U !(RAConductor<=A_URI)))
Checking (exact) 1 :E(TRUE U !(RAConductor<=A_URI))
(forward)formula 9,0,20.3891,419996,1,0,415,2.11156e+06,439,201,6178,2.07485e+06,428
FORMULA PaceMaker-PT-none-CTLCardinality-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: E((!(AVJ<=A_AtrNoiseGenerator) + URI>=3) U (!(A_Atrium>=3) + !(LRI>=1)))
=> equivalent forward existential formula: [(FwdU(Init,(!(AVJ<=A_AtrNoiseGenerator) + URI>=3)) * (!(A_Atrium>=3) + !(LRI>=1)))] != FALSE
Checking (exact) 0 :[(FwdU(Init,(!(AVJ<=A_AtrNoiseGenerator) + URI>=3)) * (!(A_Atrium>=3) + !(LRI>=1)))] != FALSE
Checking (exact) 0 :(FwdU(Init,(!(AVJ<=A_AtrNoiseGenerator) + URI>=3)) * (!(A_Atrium>=3) + !(LRI>=1)))
(forward)formula 10,0,20.391,420000,1,0,415,2.11156e+06,444,201,6183,2.07485e+06,428
FORMULA PaceMaker-PT-none-CTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: ((A_URIState>=1 * (SIG_APOut>=3 * AX(URIState<=SIG_IncrClk))) + E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))
=> equivalent forward existential formula: ([((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))) * !(A_URIState>=1))] = FALSE * ([((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))) * !(SIG_APOut>=3))] = FALSE * [(EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))) * !(URIState<=SIG_IncrClk))] = FALSE))
Checking (exact) 0 :([((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))) * !(A_URIState>=1))] = FALSE * ([((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))) * !(SIG_APOut>=3))] = FALSE * [(EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))) * !(URIState<=SIG_IncrClk))] = FALSE))
Checking (exact) 1 :([((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))) * !(SIG_APOut>=3))] = FALSE * [(EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))) * !(URIState<=SIG_IncrClk))] = FALSE)
Checking (exact) 1 :[(EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))) * !(URIState<=SIG_IncrClk))] = FALSE
Checking (exact) 0 :(EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))) * !(URIState<=SIG_IncrClk))
Checking (exact) 1 :!(URIState<=SIG_IncrClk)
Checking (exact) 1 :EY((Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))))
Checking (exact) 1 :(Init * !(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))))
Checking (exact) 1 :!(E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI)))
Checking (exact) 1 :E((A_SIG_NextVtrBeat<=A_SIG_VgetOut + A_SIG_Clk0>=2) U (AtrNoiseGenerator<=SIG_APOut + A_dV<=A_LRI))
Checking (exact) 1 :Init
(forward)formula 11,0,20.4023,420092,1,0,418,2.11174e+06,455,202,6235,2.07501e+06,432
FORMULA PaceMaker-PT-none-CTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EF(!(EG(SIG_Clk1<=A_SIG_APOut)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EG(SIG_Clk1<=A_SIG_APOut)))] != FALSE
Checking (exact) 0 :[(FwdU(Init,TRUE) * !(EG(SIG_Clk1<=A_SIG_APOut)))] != FALSE
Checking (exact) 0 :(FwdU(Init,TRUE) * !(EG(SIG_Clk1<=A_SIG_APOut)))
Checking (exact) 1 :!(EG(SIG_Clk1<=A_SIG_APOut))
Checking (exact) 1 :EG(SIG_Clk1<=A_SIG_APOut)
Checking (exact) 1 :FwdU(Init,TRUE)
Checking (exact) 1 :Init
(forward)formula 12,1,20.5464,423472,1,0,421,2.13106e+06,460,205,6238,2.09883e+06,439
FORMULA PaceMaker-PT-none-CTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (SANodeEctopic<=A_SIG_IncrClk + AG(A_SIG_Vget<=A_SANodeEctopic))
=> equivalent forward existential formula: [(FwdU((Init * !(SANodeEctopic<=A_SIG_IncrClk)),TRUE) * !(A_SIG_Vget<=A_SANodeEctopic))] = FALSE
Checking (exact) 0 :[(FwdU((Init * !(SANodeEctopic<=A_SIG_IncrClk)),TRUE) * !(A_SIG_Vget<=A_SANodeEctopic))] = FALSE
Checking (exact) 0 :(FwdU((Init * !(SANodeEctopic<=A_SIG_IncrClk)),TRUE) * !(A_SIG_Vget<=A_SANodeEctopic))
(forward)formula 13,1,20.5499,423476,1,0,421,2.13106e+06,462,205,6244,2.09883e+06,439
FORMULA PaceMaker-PT-none-CTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (A((RVConductor>=3 + A_VRP>=2) U !(A_SIG_Clk0<=SANodeEctopic)) + AG((A_dV>=3 * (A_URI<=VRGEctopic + SIG_AS<=A_VRG))))
=> equivalent forward existential formula: [(FwdU((Init * !(!((E(!(!(A_SIG_Clk0<=SANodeEctopic)) U (!((RVConductor>=3 + A_VRP>=2)) * !(!(A_SIG_Clk0<=SANodeEctopic)))) + EG(!(!(A_SIG_Clk0<=SANodeEctopic))))))),TRUE) * !((A_dV>=3 * (A_URI<=VRGEctopic + SIG_AS<=A_VRG))))] = FALSE
Checking (exact) 0 :[(FwdU((Init * !(!((E(!(!(A_SIG_Clk0<=SANodeEctopic)) U (!((RVConductor>=3 + A_VRP>=2)) * !(!(A_SIG_Clk0<=SANodeEctopic)))) + EG(!(!(A_SIG_Clk0<=SANodeEctopic))))))),TRUE) * !((A_dV>=3 * (A_URI<=VRGEctopic + SIG_AS<=A_VRG))))] = FALSE
Checking (exact) 0 :(FwdU((Init * !(!((E(!(!(A_SIG_Clk0<=SANodeEctopic)) U (!((RVConductor>=3 + A_VRP>=2)) * !(!(A_SIG_Clk0<=SANodeEctopic)))) + EG(!(!(A_SIG_Clk0<=SANodeEctopic))))))),TRUE) * !((A_dV>=3 * (A_URI<=VRGEctopic + SIG_AS<=A_VRG))))
(forward)formula 14,1,20.5569,423884,1,0,421,2.13107e+06,469,205,6271,2.09887e+06,439
FORMULA PaceMaker-PT-none-CTLCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EX(EF((SIG_Vget>=2 * SANode>=2)))
=> equivalent forward existential formula: [(FwdU(EY(Init),TRUE) * (SIG_Vget>=2 * SANode>=2))] != FALSE
Checking (exact) 0 :[(FwdU(EY(Init),TRUE) * (SIG_Vget>=2 * SANode>=2))] != FALSE
Checking (exact) 0 :(FwdU(EY(Init),TRUE) * (SIG_Vget>=2 * SANode>=2))
(forward)formula 15,0,20.5574,424220,1,0,421,2.13107e+06,473,205,6275,2.09887e+06,439
FORMULA PaceMaker-PT-none-CTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
BK_STOP 1464827521770
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLCardinality -its
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -XX:MaxPermSize=512m -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination CTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its
Java HotSpot(TM) 64-Bit Server VM warning: ignoring option MaxPermSize=512m; support was removed in 8.0
Jun 02, 2016 12:31:40 AM fr.lip6.move.gal.application.Application transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2016 12:31:40 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 83 ms
Jun 02, 2016 12:31:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 70 places.
Jun 02, 2016 12:31:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 164 transitions.
Jun 02, 2016 12:31:40 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 230 ms
Jun 02, 2016 12:31:40 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLCardinality.gal : 128 ms
Jun 02, 2016 12:31:40 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLCardinality.ctl : 2 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PaceMaker-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PaceMaker-PT-none.tgz
mv PaceMaker-PT-none execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2979"
echo " Executing tool itstools"
echo " Input is PaceMaker-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r217su-smll-146468018900642"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;