About the Execution of ITS-Tools for DLCshifumi-PT-2a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
317.480 | 5978.00 | 14962.00 | 196.80 | TFFFTFFTTFTFTTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-2979
Executing tool itstools
Input is DLCshifumi-PT-2a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r217su-smll-146468017900187
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-0
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-1
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-10
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-11
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-12
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-13
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-14
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-15
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-2
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-3
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-4
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-5
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-6
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-7
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-8
FORMULA_NAME DLCshifumi-PT-2a-ReachabilityCardinality-9
=== Now, execution of the tool begins
BK_START 1464723041661
its-reach command run as :
/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201605191313/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi\_PT\_2a\_flat,4.74756e+14,0.436106,15888,2,3301,5,60584,6,0,1365,30003,0
Total reachable state count : 474756150994301
Verifying 16 reachability properties.
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-0 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-0,0,0.437602,15892,1,0,5,60584,7,0,1371,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-1 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-1 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-1,0,0.439138,15920,1,0,5,60584,8,0,1372,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-2 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-2 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-2,0,0.439565,15920,1,0,5,60584,9,0,1377,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-3 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-3 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-3
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-3,0,0.43976,15920,1,0,5,60584,10,0,1378,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-4 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-4 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-4,0,0.443025,15920,1,0,5,60584,11,0,1402,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-5 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-5 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-5,2.17909e+10,0.447858,15920,2,1535,6,60584,12,0,1441,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-6 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-6 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-6,0,0.453818,15920,1,0,6,60584,13,0,1446,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-7 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-7 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-7,0,0.454573,15920,1,0,6,60584,14,0,1454,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-8 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-8 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-8,0,0.455733,15920,1,0,6,60584,15,0,1470,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-9 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-9 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-9
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-9,0,0.45813,15920,1,0,6,60584,16,0,1482,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-10 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-10,0,0.458959,15920,1,0,6,60584,17,0,1491,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-11 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-11,2.90546e+10,0.460965,15920,2,2885,7,60584,18,0,1508,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-12 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-12,0,0.461423,15920,1,0,7,60584,19,0,1509,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-13 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-13
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-13,0,0.462432,15920,1,0,7,60584,20,0,1525,30003,0
Reachability property DLCshifumi-PT-2a-ReachabilityCardinality-14 does not hold.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : DLCshifumi-PT-2a-ReachabilityCardinality-14
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-14,0,0.463204,15920,1,0,7,60584,21,0,1539,30003,0
Invariant property DLCshifumi-PT-2a-ReachabilityCardinality-15 is true.
FORMULA DLCshifumi-PT-2a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCshifumi-PT-2a-ReachabilityCardinality-15,0,0.463543,15920,1,0,7,60584,22,0,1544,30003,0
BK_STOP 1464723047639
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -XX:MaxPermSize=512m -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its
Java HotSpot(TM) 64-Bit Server VM warning: ignoring option MaxPermSize=512m; support was removed in 8.0
May 31, 2016 7:30:45 PM fr.lip6.move.gal.application.Application transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2016 7:30:45 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 249 ms
May 31, 2016 7:30:45 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 188 places.
May 31, 2016 7:30:46 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 888 transitions.
May 31, 2016 7:30:46 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 350 ms
May 31, 2016 7:30:46 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.gal : 35 ms
May 31, 2016 7:30:46 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-2a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-2a.tgz
mv DLCshifumi-PT-2a execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2979"
echo " Executing tool itstools"
echo " Input is DLCshifumi-PT-2a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r217su-smll-146468017900187"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;