Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-2979
Executing tool marcie
Input is S_PermAdmissibility-COL-01, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r185kn-smll-146444131201223
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1464972934491


Marcie rev. 8535M (built: crohr on 2016-04-27)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=ReachabilityDeadlock.xml --mcc-mode --memory=6 --suppress

parse successfull
net created successfully

Unfolding complete |P|=208|T|=1024|A|=6080
Time for unfolding: 0m 2.727sec

Net: PermAdmissibility_COL_01
(NrP: 208 NrTr: 1024 NrArc: 5984)

net check time: 0m 0.001sec

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.029sec

init dd package: 0m 3.735sec


RS generation: 0m28.441sec


-> reachability set: #nodes 55694 (5.6e+04) #states 52,537 (4)



starting MCC model checker
--------------------------

checking: EF [DEADLOCK]
normalized: E [true U DEADLOCK]

-> the formula is TRUE

FORMULA PermAdmissibility-COL-01-ReachabilityDeadlock-0 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 5m26.582sec


Total processing time: 6m25.445sec


BK_STOP 1464973320102

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
aux5_input2
aux7_input1
aux7_input0
aux6_input7
aux6_input6
aux6_input3
aux5_input7
aux5_input6
aux5_input3
aux6_input2
aux8_input4
aux8_input5
aux8_input0
aux8_input1
aux7_input4
aux7_input5
in1_input2
in1_input3
in1_input4
in1_input5
in1_input6
in1_input7
in2_input0
in2_input1
in2_input4
in2_input5
in2_input6
in2_input7
in3_input0
in3_input7
in4_input0
in4_input1
in4_input2
in4_input3
in4_input4
in4_input5
in3_input6
in3_input1
in3_input2
in3_input3

The net has transition(s) that can never fire:
switch1_0_2
switch5_0_5
switch1_0_3
switch1_0_6
switch1_0_7
switch1_1_0
switch1_1_1
switch1_1_2
switch1_1_3
switch3_3_0
switch3_3_1
switch3_3_2
switch3_3_4
switch3_3_3
switch1_0_1
switch3_4_6
switch5_0_1
switch3_4_7
switch3_5_0
switch3_5_1
switch3_5_2
switch1_0_0
switch5_0_4
switch5_1_0
switch5_1_1
switch5_2_1
switch5_1_4
switch5_1_5
switch5_2_0
switch5_4_1
switch5_2_2
switch5_2_3
switch5_2_4
switch5_2_5
switch1_1_6
switch1_1_7
switch1_2_0
switch1_2_1
switch1_2_2
switch1_2_3
switch1_2_4
switch1_2_5
switch1_2_6
switch1_2_7
switch1_3_0
switch1_3_1
switch1_3_2
switch1_3_3
switch1_3_4
switch1_3_5
switch1_3_6
switch1_3_7
switch1_4_0
switch1_4_1
switch1_4_2
switch1_4_3
switch1_4_5
switch1_4_4
switch1_4_6
switch1_4_7
switch1_5_0
switch1_5_1
switch1_5_2
switch1_5_3
switch1_5_4
switch1_5_5
switch1_5_6
switch1_5_7
switch1_6_0
switch1_6_1
switch1_6_2
switch1_6_3
switch1_6_4
switch1_6_5
switch1_6_6
switch1_6_7
switch1_7_0
switch1_7_1
switch1_7_2
switch1_7_3
switch1_7_4
switch1_7_5
switch1_7_6
switch1_7_7
switch3_0_0
switch3_0_1
switch3_0_2
switch3_0_3
switch3_0_5
switch3_0_4
switch3_0_6
switch3_0_7
switch3_1_0
switch3_1_1
switch3_1_2
switch3_1_3
switch3_1_4
switch3_1_5
switch3_1_6
switch3_1_7
switch3_2_0
switch3_2_1
switch3_2_2
switch3_2_3
switch3_2_4
switch3_2_5
switch6_5_5
switch6_6_0
switch6_6_1
switch6_6_2
switch6_6_3
switch6_6_4
switch6_6_5
switch6_6_6
switch6_6_7
switch3_3_5
switch3_4_0
switch3_4_1
switch3_4_2
switch3_4_3
switch3_4_5
switch3_4_4
switch7_2_1
switch7_1_4
switch7_1_5
switch7_2_0
switch7_4_1
switch7_2_2
switch7_2_3
switch7_2_5
switch7_2_4
switch3_5_3
switch3_5_4
switch3_5_5
switch3_5_6
switch3_5_7
switch3_6_0
switch3_6_1
switch3_6_2
switch3_6_3
switch3_6_4
switch3_6_5
switch3_6_6
switch3_6_7
switch3_7_0
switch3_7_1
switch3_7_2
switch3_7_3
switch3_7_4
switch3_7_5
switch3_7_6
switch3_7_7
switch2_0_0
switch2_0_1
switch2_0_2
switch2_0_3
switch2_0_6
switch2_0_7
switch2_1_0
switch2_1_1
switch2_1_2
switch2_1_3
switch2_1_6
switch2_1_7
switch2_2_0
switch2_2_1
switch2_2_2
switch2_2_3
switch2_2_4
switch2_2_5
switch2_2_6
switch2_2_7
switch2_3_0
switch2_3_1
switch2_3_2
switch2_3_3
switch2_3_4
switch2_3_5
switch2_3_6
switch2_3_7
switch2_4_0
switch2_4_1
switch2_4_2
switch2_4_3
switch2_4_4
switch2_4_5
switch2_4_6
switch2_4_7
switch2_5_0
switch2_5_1
switch2_5_2
switch2_5_3
switch2_5_4
switch2_5_5
switch2_5_6
switch2_5_7
switch2_6_0
switch2_6_1
switch2_6_2
switch2_6_3
switch2_6_4
switch2_6_5
switch2_6_6
switch2_6_7
switch2_7_0
switch2_7_1
switch2_7_2
switch2_7_3
switch2_7_4
switch2_7_5
switch2_7_6
switch2_7_7
switch4_0_0
switch4_0_1
switch4_0_2
switch4_0_3
switch4_0_5
switch4_0_4
switch4_0_6
switch4_0_7
switch4_1_0
switch4_1_1
switch4_1_2
switch4_1_3
switch4_1_4
switch4_1_5
switch4_1_6
switch4_1_7
switch4_2_0
switch4_2_1
switch4_2_2
switch4_2_3
switch4_2_4
switch4_2_5
switch4_3_0
switch4_3_1
switch4_3_2
switch4_3_3
switch4_3_4
switch4_3_5
switch4_4_0
switch4_4_1
switch4_4_2
switch4_4_3
switch4_4_4
switch4_4_5
switch4_4_6
switch4_4_7
switch4_5_0
switch4_5_1
switch4_5_2
switch4_5_3
switch4_5_4
switch4_5_5
switch4_5_6
switch4_5_7
switch4_6_0
switch4_6_1
switch4_6_2
switch4_6_3
switch4_6_4
switch4_6_5
switch4_6_6
switch4_6_7
switch4_7_0
switch4_7_1
switch4_7_2
switch4_7_3
switch4_7_4
switch4_7_5
switch4_7_6
switch4_7_7
switch5_0_0
switch5_2_6
switch5_2_7
switch5_3_0
switch5_3_1
switch5_3_2
switch5_3_3
switch5_3_4
switch5_3_5
switch5_3_6
switch5_3_7
switch5_4_0
switch5_4_5
switch5_4_4
switch7_1_1
switch5_5_0
switch5_5_1
switch5_5_4
switch5_5_5
switch5_6_0
switch5_6_1
switch5_6_2
switch5_6_3
switch5_6_4
switch5_6_5
switch5_6_6
switch5_6_7
switch5_7_0
switch5_7_1
switch5_7_2
switch5_7_3
switch5_7_4
switch5_7_5
switch5_7_6
switch5_7_7
switch8_0_0
switch8_0_1
switch8_0_5
switch8_0_4
switch8_1_0
switch8_1_1
switch8_2_1
switch8_1_4
switch8_1_5
switch8_2_0
switch8_4_1
switch8_2_2
switch8_2_3
switch8_2_4
switch8_2_5
switch8_2_6
switch8_2_7
switch8_3_0
switch8_3_1
switch8_3_2
switch8_3_3
switch8_3_4
switch8_3_5
switch8_3_6
switch8_3_7
switch8_4_0
switch8_4_5
switch8_4_4
switch8_5_0
switch8_5_1
switch8_5_4
switch8_5_5
switch8_6_0
switch8_6_1
switch8_6_2
switch8_6_3
switch8_6_4
switch8_6_5
switch8_6_6
switch8_6_7
switch8_7_0
switch8_7_1
switch8_7_2
switch8_7_3
switch8_7_4
switch8_7_5
switch8_7_6
switch8_7_7
switch6_0_0
switch6_0_1
switch6_0_5
switch6_0_4
switch6_1_0
switch6_1_1
switch6_2_1
switch6_1_4
switch6_1_5
switch6_2_0
switch6_4_1
switch6_2_2
switch6_2_3
switch6_2_4
switch6_2_5
switch6_2_6
switch6_2_7
switch6_3_0
switch6_3_1
switch6_3_2
switch6_3_3
switch6_3_4
switch6_3_5
switch6_3_6
switch6_3_7
switch6_4_0
switch6_4_4
switch6_4_5
switch6_5_0
switch6_5_1
switch6_5_4
switch6_7_0
switch6_7_1
switch6_7_2
switch6_7_3
switch6_7_4
switch6_7_5
switch6_7_6
switch6_7_7
switch7_0_0
switch7_0_1
switch7_0_5
switch7_0_4
switch7_1_0
switch7_2_6
switch7_2_7
switch7_3_0
switch7_3_1
switch7_3_2
switch7_3_3
switch7_3_4
switch7_3_5
switch7_3_6
switch7_3_7
switch7_4_0
switch7_4_4
switch7_4_5
switch7_5_0
switch7_5_1
switch7_5_4
switch7_5_5
switch7_6_0
switch7_6_1
switch7_6_2
switch7_6_3
switch7_6_4
switch7_6_5
switch7_6_6
switch7_6_7
switch7_7_0
switch7_7_1
switch7_7_2
switch7_7_3
switch7_7_4
switch7_7_5
switch7_7_6
switch7_7_7

check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.005sec

414 665 834 934 1014 1129 1205 1252 1256 1239 1254 1267 1277 1374 1422 1466 1477 2354 3081 3273 3444 3822 4279 4749 4783 4892 4919 4970 4996 5508 5812 5983 6264 6497 6579 6697 6749 6876 7000 7010 7523 7813 7958 8163 8152 8376 8395 8532 8685 8622 8702 8816 8886 8719 9453 9909 10157 10684 10532 10699 11179 11029 11151 10952 11445 11797 11641 11287 11678 11923 11553 12053 12162 11863 11942 12368 12615 12546 12295 12325 12365 12442 12569 12704 12822 12871 13104 13357 13566 13686 13692 13826 14090 14177 14294 14404 14509 14578 14612 14697 14854 14978 15105 15195 15250 15322 15378 15615 15662 15790 15906 15995 16071 16123 16168 16312 16435 16585 16685 16742 16814 16872 17057 17183 17287 17378 17478 17553 17592 17697 17754 17852 17975 18075 18129 18202 18256 18466 18508 18606 18721 18806 18887 18943 18997 19040 19142 19275 19385 19434 19514 19570 19727 19791 19825 19912 19975 20008 20039 20106 20201 20280 20384 20409 20471 20516 20549 20632 20675 20735 20783 20789 20884 21003 21063 21106 21133 21231 21275 21339 21375 21408 21476 21638 21724 21741 21792 21884 21959 22037 22113 22160 22184 22243 22288 22370 22442 22496 22648 22726 22754 22785 22881 22933 23026 23092 23125 23137 23173 23226 23299 23361 23435 23560 23667 23669 23711 23768 23801 23830 23885 23923 23914 23953 23975 24017 24049 24089 24184 24220 24234 24273 24333 24354 24399 24417 24453 24444 24470 24507 24553 24585 24627 24694 24745 24763 24788 24821 24862 24875 24877 24907 24932 25035 25097 25143 25150 25172 25193 25254 25305 25336 25350 25357 25373 25384 25433 25480 25551 25582 25580 25589 25619 25639 25647 25645 25656 25683 25691 25817 25886 25944 25953 26004 26043 26084 26137 26199 26241 26241 26301 26330 26376 26414 26502 26553 26611 26622 26664 26705 26743 26782 26806 26876 26876 26914 26967 27006 27037 27119 27133 27145 27164 27178 27209 27219 27229 27237 27250 27309 27381 27395 27433 27454 27482 27506 27577 27624 27647 27679 27699 27717 27726 27751 27864 27922 27936 27939 27976 28017 28043 28042 28042 28063 28139 28186 28202 28230 28230 28272 28303 28303 28326 28326 28336 28418 28485 28510 28532 28551 28574 28639 28653 28663 28677 28734 28796 28844 28851 28877 28909 28953 28996 29002 29021 29077 29109 29147 29196 29224 29252 29276 29332 29382 29388 29427 29456 29453 29478 29508 29535 29613 29664 29711 29734 29738 29756 29792 29840 29840 29889 29912 29906 29908 29937 29940 30000 30015 30027 30032 30047 30069 30063 30077 30082 30085 30138 30205 30228 30287 30310 30314 30334 30375 30406 30438 30483 30513 30516 30513 30531 30581 30646 30669 30692 30694 30697 30714 30747 30773 30787 30804 30807 30815 30804 30822 33043 34026 34117 35671 35874 37834 38425 39465 40142 40567 41356 41597 41981 42208 42521 42878 43007 43594 43697 45498 48273 49516 51102 51738 52371 52793 53492 53716 54002 54169 54431 54618 54763 55090 55132 55327 55398 55486 55556 55615 55694
iterations count:487864 (476), effective:1864 (1)

initing FirstDep: 0m 0.005sec

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53294 53316 53344 53415 53417 53435 53439 53450 53451 53427 53415 53416 53405 53401 53380 53502 53555 53571 53591 53651 53651 53660 53642 53644 53632 53615 53613 53621 53634 53623 53612 53579 53585 53613 53625 53624 53602 53599 53597 53597 53583 53578 54328 54378 54422 54430 54443 54492 54495 54475 54480 54469 54466 54461 54469 54455 54468 54471 54421 54420 54411 54466 54496 54499 54517 54490 54480 54476 54464 54449 54570 54602 54614 54611 54648 54645 54616 54620 54609 54577 54553 54559 54530 54540 54532 54474 54471 54461 54496 54512 54503 54497 54461 54448 54444 54432 54415 54614 54639 54676 54712 54695 54708 54689 54687 54691 54715 54704 54720 54730 54709 54754 54769 54764 54799 54788 54781 54745 54737 54729 54762 54760 54768 54778 54755 54276 54261 54275 54277 54276 54258 54270 54260 54222 54204 54185 54170 54156 54162 54145 54158 54142 54104 53326 53302 53291 53269 53264 53242 53240 53225 53206 53196 53205 53159 54386 54451 54479 54570 54583 54642 54693 54712 54743 54754 54757 54785 54790 54789 54794 54808 54818 54806 54802 54994 54982 55007 55041 55053 55025 55029 55046 55006 54998 54985 54985 54994 54943 54918 54915 55233 55253 55265 55295 55298 55268 55249 55218 55214 55227 55299 55281 55277 55280 55279 55261 55443 55415 55381 55358 55397 55334 55304 55310 54695 54636 54604 54557 54552 54513 54897 54944 54992 54999 55011 54994 54988 54994 55088 55108 55129 55167 55179 55165 55152 55159 55166 55175 55176 55178 55210 55217 55200 55176 55176 55177 55215 55217 55223 55201 55186 55195 55941 56008 56030 56035 56051 56061 56041 56022 56023 56025 56023 56028 56018 56020 56023 56011 55980 55971 55965 55991 55989 55986 55962 55943 55937 56361 56416 56437 56443 56425 56475 56471 56447 56416 56407 56382 56408 56432 56428 56405 56398 56385 56372 56352 56360 56321 56260 56269 56258 56226 56221 56179 56154 56112 56109 56073 55644 55585 55591 54796 56002 56738 54814 56954 57410 55694
iterations count:2808353 (2742), effective:8365 (8)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_PermAdmissibility-COL-01"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_PermAdmissibility-COL-01.tgz
mv S_PermAdmissibility-COL-01 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2979"
echo " Executing tool marcie"
echo " Input is S_PermAdmissibility-COL-01, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r185kn-smll-146444131201223"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;