Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-2979
Executing tool tapaalPAR
Input is S_GlobalResAllocation-PT-05, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r148kn-smll-146416256000777
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-0
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-1
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-10
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-11
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-12
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-13
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-14
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-15
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-2
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-3
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-4
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-5
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-6
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-7
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-8
FORMULA_NAME GlobalResAllocation-COL-05-CTLCardinality-9

=== Now, execution of the tool begins

BK_START 1464369264885


**********************************************
* TAPAAL Parallel verifying CTLCardinality *
**********************************************

BK_STOP 1464369277075

--------------------
content from stderr:

/home/mcc/BenchKit/bin/ctl.sh: line 47: 370 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 372 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 374 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 376 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 378 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 382 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 384 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 386 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 388 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 390 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 394 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 396 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 398 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 400 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 402 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 47: 404 Illegal instruction timeout $TIMEOUT_SEQ $VERIFYPN_SEQ -ctl czero -s DFS -n -x $i model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 406 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 410 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 412 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 414 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 420 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 422 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 424 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 426 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 428 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 432 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 434 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 436 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 438 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 440 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 442 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 55: 444 Illegal instruction timeout $TIMEOUT_COM $VERIFYPN_COM -ctl czero -s DFS -n -x $j model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 448 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 450 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 452 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 454 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 456 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 458 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 460 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 462 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 464 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 468 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 470 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 472 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 474 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 476 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 478 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 63: 482 Illegal instruction timeout $TIMEOUT_PAR $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 484 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 485 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 486 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 487 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 490 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 491 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 492 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 493 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 494 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 495 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 498 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 499 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 500 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 503 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 504 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml
/home/mcc/BenchKit/bin/ctl.sh: line 70: 505 Illegal instruction $VERIFYPN_PAR -ctl par -s DFS -n -x $k model.pnml CTLCardinality.xml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_GlobalResAllocation-PT-05"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="tapaalPAR"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_GlobalResAllocation-PT-05.tgz
mv S_GlobalResAllocation-PT-05 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2979"
echo " Executing tool tapaalPAR"
echo " Input is S_GlobalResAllocation-PT-05, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r148kn-smll-146416256000777"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;