Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.............
=====================================================================
Generated by BenchKit 2-2270
Executing tool marcie
Input is Raft-PT-04, examination is CTLFireabilitySimple
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r246su-smll-143368767200160
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-0
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-1
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-10
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-11
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-12
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-13
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-14
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-15
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-2
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-3
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-4
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-5
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-6
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-7
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-8
FORMULA_NAME Raft-PT-04-CTLFireabilitySimple-9

=== Now, execution of the tool begins

BK_START 1433894865254

Model: Raft-PT-04
reachability algorithm:
Saturation-based algorithm
variable ordering algorithm:
Calculated like in [Noa99]
--memory=6 --suppress --rs-algorithm=3 --place-order=5

Marcie rev. 1429:1432M (built: crohr on 2014-10-22)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireabilitySimple.xml --memory=6 --suppress --rs-algorithm=3 --place-order=5

parse successfull
net created successfully

(NrP: 88 NrTr: 160 NrArc: 563)

net check time: 0m0sec

parse formulas successfull
formulas created successfully
place and transition orderings generation:0m0sec

init dd package: 0m3sec


RS generation: 0m10sec


-> reachability set: #nodes 1652 (1.7e+03) #states 2,965,858,466,581 (12)



starting MCC model checker
--------------------------

checking: EF [IS-FIREABLE [t16]]
normalized: E [true U IS-FIREABLE [t16]]

-> the formula is TRUE

FORMULA Raft-PT-04-CTLFireabilitySimple-0 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [t22]]
normalized: E [true U IS-FIREABLE [t22]]

-> the formula is TRUE

FORMULA Raft-PT-04-CTLFireabilitySimple-1 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [t3]]
normalized: E [true U IS-FIREABLE [t3]]

-> the formula is TRUE

FORMULA Raft-PT-04-CTLFireabilitySimple-2 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EX [IS-FIREABLE [t154]]
normalized: EX [IS-FIREABLE [t154]]

.-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-3 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AX [IS-FIREABLE [t99]]
normalized: ~ [EX [~ [IS-FIREABLE [t99]]]]

.-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-4 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: E [IS-FIREABLE [t73] U IS-FIREABLE [t48]]
normalized: E [IS-FIREABLE [t73] U IS-FIREABLE [t48]]

-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-5 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [t12]]
normalized: ~ [E [true U ~ [IS-FIREABLE [t12]]]]

-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-6 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [IS-FIREABLE [t99] U IS-FIREABLE [t106]]
normalized: [~ [E [~ [IS-FIREABLE [t99]] U [~ [IS-FIREABLE [t106]] & ~ [IS-FIREABLE [t99]]]]] & ~ [EG [~ [IS-FIREABLE [t106]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-7 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [t122]]
normalized: E [true U IS-FIREABLE [t122]]

-> the formula is TRUE

FORMULA Raft-PT-04-CTLFireabilitySimple-8 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EG [IS-FIREABLE [t62]]
normalized: EG [IS-FIREABLE [t62]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-9 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [t56]]
normalized: ~ [E [true U ~ [IS-FIREABLE [t56]]]]

-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [IS-FIREABLE [t90] U IS-FIREABLE [t142]]
normalized: [~ [EG [~ [IS-FIREABLE [t142]]]] & ~ [E [~ [IS-FIREABLE [t90]] U [~ [IS-FIREABLE [t142]] & ~ [IS-FIREABLE [t90]]]]]]

..
EG iterations: 2
-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [t64]]
normalized: ~ [E [true U ~ [IS-FIREABLE [t64]]]]

-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [t100]]
normalized: ~ [E [true U ~ [IS-FIREABLE [t100]]]]

-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AX [IS-FIREABLE [t51]]
normalized: ~ [EX [~ [IS-FIREABLE [t51]]]]

.-> the formula is TRUE

FORMULA Raft-PT-04-CTLFireabilitySimple-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [IS-FIREABLE [t121] U IS-FIREABLE [t51]]
normalized: [~ [EG [~ [IS-FIREABLE [t51]]]] & ~ [E [~ [IS-FIREABLE [t121]] U [~ [IS-FIREABLE [t51]] & ~ [IS-FIREABLE [t121]]]]]]

..
EG iterations: 2
-> the formula is FALSE

FORMULA Raft-PT-04-CTLFireabilitySimple-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec


Total processing time: 0m16sec


BK_STOP 1433894882090

--------------------
content from stderr:

check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m0sec

354 397 454 501 525 405 436 748 759 976 915 1025 923 957 1016 945 1060 1164 1050 1246 1184 939 1306 1299 1376 1396 1348 1298 1157 1304 1304 1339 1348 1290 1279 913 759 938 938 1059 1046 1173 1160 1062 952 1042 1000 968 1094 1163 1145 884 1004 964 1071 1019 1281 1273 1132 1089 1156 1145 1104 1151 1197 1202 968 847 1116 1107 1167 1169 1262 1382 1379 1087 935 1124 1155 1123 1111 1312 1360 1305 1136 898 1058 1168 1170 1207 1346 1377 1307 1053 900 1114 1124 1114 1209 1304 1305 1343 997 853 1680 1790 1774 1829 1968 1999 1955 1675 1473 1735 1746 1736 1831 1926 1927 2008 1619 1569 1774 1775 1817 1758 1979 2072 1995 1450 1571 1738 1738 1859 1757 1929 2120 2049 1452 1498 2598 2604 2705 2522 2692 2789 2717 2130 2368 2555 2556 2754 2483 2629 2855 2784 2132 2283 2584 2704 2741 2459 2792 2829 2749 2355 2265 2497 2691 2620 2142 2534 2577 2395 1905 1512 1899 1992 2726 3093 3189 3195 3206 3363 3527 3551 3391 2727 2861 3096 3199 3153 3159 3315 3508 3536 3428 2958 2834 3041 3262 3285 3291 3309 3482 3501 3352 3045 2889 3041 3248 3271 3180 3107 3147 3143 3147 2888 2564 3342 3683 3712 3718 3453 3579 3643 3649 3386 3272 3335 3657 3677 3641 3542 3475 3564 3570 3491 3170 3306 3487 3489 3493 3504 3607 3757 3759 3590 3214 2948 3405 3495 3501 3196 3282 3407 3353 3239 2544 2320 2333 2310 1952 2365 3589 3672 3697 3706 3857 4006 4015 3896 3501 3512 3866 3941 3978 3987 4181 4316 4325 4157 3701 3526 3912 3987 3996 3962 4164 4299 4308 4160 3694 3529 3830 3905 3930 3897 4033 4152 4161 4029 3454 3277 3989 4291 4300 4336 4348 4618 4627 4411 3858 4007 4319 4599 4608 4690 4696 4940 4982 4826 4155 4037 4326 4533 4542 4620 4680 4943 4952 4796 3887 4040 4260 4467 4476 4267 4226 4399 4408 4252 3362 3134 2917 2712 2754 2784 2224 3143 3302 3311 3257 3417 3672 3681 3523 3129 3146 3486 3553 3607 3616 3741 3870 3879 3721 3337 3332 3614 3629 3639 3617 3717 3797 3814 3549 3299 3420 3612 3621 3606 3427 3606 3617 3615 3299 3142 3450 3832 3841 3834 3575 3789 3851 3823 3477 3684 3828 4255 4264 4273 3903 4134 4347 4196 3820 3715 3875 4156 4165 4174 4208 4442 4414 4258 3387 3610 3880 4021 4038 3697 3755 3929 3938 3678 2946 2441 2415 2476 2153 2192 2025 2197 2392 2468 2441 2469 2712 2729 2604 2389 2502 2725 2759 2713 2802 3010 2983 2805 2507 2590 2774 2743 2735 2806 2994 2990 2786 2470 2559 2697 2651 2634 2756 2851 2843 2637 2378 2204 2627 2777 2864 2644 3136 3174 3021 2715 2599 3160 3202 3236 3041 3527 3564 3285 2865 2817 3171 3258 3220 3258 3595 3548 3364 2932 2896 3140 3174 2981 3009 3281 3172 2986 2324 1975 1795 1804 1610 2285 2423 2409 2289 2354 2655 2779 2689 2640 2632 2244 2377 2843 2903 2861 2848 2849 3097 3092 3095 3208 3227 2902 2623 2849 2868 2830 2849 2906 2910 3107 3266 3321 3177 2889 2676 2747 2803 2776 2891 2953 2873 3051 3221 3183 3080 2878 2606 2332 2718 2949 2744 2780 2862 3098 3251 3275 3386 3287 2913 2978 3430 3443 3475 3557 3639 3574 3705 4025 4178 3898 3580 3234 3369 3500 3519 3636 3665 3454 3811 4172 4072 3919 3680 3241 3035 3338 3571 3581 3421 3251 3480 3726 3465 3458 3429 2611 2497 2308 2313 2327 2684 2761 2774 2854 2840 2813 3091 3278 3255 3078 2952 2883 2903 3151 3319 3381 3294 3255 3522 3691 3588 3569 3577 2906 2933 3275 3363 3331 3219 3216 3509 3553 3609 3661 3602 3252 3047 3243 3309 3259 3227 3340 3220 3426 3498 3589 3524 3234 2934 2685 3015 3236 3377 3286 3194 3524 3803 3642 3629 3618 2919 3136 3639 3825 3803 3623 3618 3987 4029 4121 4177 4103 3619 3404 3581 3784 3680 3660 3792 3737 4018 4119 4252 4154 3726 3412 3506 3582 3639 3692 3633 3334 3598 3773 3892 3609 3320 2881 2235 2289 2139 2002 2431 2567 2453 2458 2493 2661 2761 2736 2885 2868 2555 2508 2908 2983 2871 2868 3005 2967 3173 3257 3335 3271 2927 2752 2895 2866 2928 2929 3009 2970 3166 3326 3381 3237 2949 2709 2860 2894 2921 2974 2992 2881 3083 3297 3308 3148 2979 2650 2492 2914 3058 3141 2934 3008 3362 3571 3310 3303 3274 2671 2862 3338 3497 3486 3382 3362 3682 3644 3691 3800 3655 3142 3002 3299 3492 3459 3394 3389 3658 3720 3775 3831 3757 3273 3106 3224 3477 3295 3319 3232 3280 3327 3304 3499 3472 3034 2612 2016 1934 2037 2006 2309 2442 2464 2423 2373 2571 2730 2691 2633 2507 2366 2289 2594 2704 2722 2708 2658 2805 2981 2947 2884 2758 2510 2291 2634 2707 2725 2711 2661 2808 3043 2951 2887 2761 2513 2292 2628 2701 2719 2706 2655 2802 3037 2946 2857 2755 2469 2283 2692 2965 2874 2782 2733 3051 3027 3118 3183 3111 2592 2709 3113 3386 3339 3203 3154 3435 3414 3461 3570 3425 2696 2839 3116 3364 3342 3162 3157 3438 3417 3464 3573 3428 2699 2842 3119 3305 3283 3103 2977 3147 3126 3173 3282 3137 2408 2294 1881 2093 1923 2338 2372 2399 2452 2470 2359 2616 2803 2765 2662 2461 2385 2342 2694 2782 2750 2638 2686 2802 2868 2843 2992 2975 2722 2470 2602 2659 2690 2747 2756 2731 2886 3047 2844 2880 2839 2327 2358 2650 2771 2633 2652 2721 2660 2890 2938 3026 2964 2674 2457 2325 2743 3016 2961 2833 2784 3006 3144 3168 3336 3180 2874 2824 3118 3249 3268 3385 3395 3203 3447 3791 3474 3571 3456 2741 2792 3176 3430 3200 3272 3306 3215 3533 3649 3755 3568 3241 2989 2778 3135 3272 3334 3202 2987 3213 3459 3198 3191 3162 2801 2462 1995 1913 1949 1691 2773 2909 2821 2783 2744 2764 3035 3054 3169 3078 2758 2770 2916 3029 3110 3125 3172 3031 3241 3468 3289 3313 3224 2724 2807 3048 3187 3073 3096 3113 3058 3245 3414 3442 3310 3096 2927 2756 3036 3168 3190 3158 3095 3303 3393 3303 3254 3246 2978 2854 2946 3190 3276 3353 3412 3176 3454 3734 3535 3615 3491 2926 3163 3571 3775 3670 3694 3747 3612 3892 4103 4179 3992 3566 3458 3175 3490 3711 3827 3805 3625 3948 4100 3948 3973 3904 3499 3400 3500 3680 3616 3611 3607 3426 3574 3749 3868 3585 3296 2948 2711 2371 2475 2351 2057 2384 2439 2484 2525 2411 2582 2785 2682 2663 2637 2273 2340 2671 2764 2714 2682 2795 2681 2774 2976 3116 2948 2704 2586 2407 2602 2742 2832 2745 2706 2868 3009 2951 2946 2940 2690 2495 2668 2658 2720 2721 2801 2783 2871 3047 3105 2876 2718 2577 2490 2797 2989 2809 2900 2981 2830 2959 3296 3449 3168 2851 2799 2792 3172 3370 3415 3382 3317 3518 3497 3544 3653 3508 3232 3117 3211 3224 3256 3338 3366 3350 3474 3745 3829 3566 3301 3019 2820 3160 3354 3344 3214 3031 3195 3275 3347 3443 3339 2888 2572 1667 1917 2101 1961 2370 2464 2413 2418 2471 2380 2604 2770 2825 2681 2393 2429 2337 2589 2729 2801 2769 2657 2914 3003 2914 2933 2893 2589 2482 2656 2726 2708 2709 2789 2771 2859 2986 3069 2864 2670 2565 2478 2670 2743 2808 2651 2699 2852 2896 2952 3004 2945 2635 2489 2341 2676 2933 3038 2947 2855 3062 3313 3205 3193 3181 2829 2842 3198 3211 3295 3325 3407 3337 3465 3734 3816 3496 3251 3110 2909 3188 3392 3452 3270 3319 3483 3563 3562 3674 3600 3176 3019 3107 3209 3197 3329 3262 2943 3167 3528 3484 3275 3036 2462 2335 2067 1887 2133
iterations count:1330903 (8318), effective:52691 (329)

initing FirstDep: 0m0sec

1959
iterations count:1648 (10), effective:28 (0)

iterations count:779 (4), effective:17 (0)
1652
iterations count:1005 (6), effective:37 (0)

iterations count:160 (1), effective:0 (0)

iterations count:186 (1), effective:1 (0)

iterations count:278 (1), effective:4 (0)

iterations count:967 (6), effective:23 (0)

iterations count:397 (2), effective:9 (0)
1907
iterations count:1598 (9), effective:25 (0)

iterations count:537 (3), effective:9 (0)

iterations count:284 (1), effective:4 (0)

iterations count:917 (5), effective:21 (0)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Raft-PT-04"
export BK_EXAMINATION="CTLFireabilitySimple"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/root/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Raft-PT-04.tgz
mv Raft-PT-04 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2270"
echo " Executing tool marcie"
echo " Input is Raft-PT-04, examination is CTLFireabilitySimple"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r246su-smll-143368767200160"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireabilitySimple" = "ReachabilityComputeBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireabilitySimple" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireabilitySimple.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireabilitySimple.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireabilitySimple.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireabilitySimple.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;