About the Execution of Marcie for S_ResAllocation-PT-R015C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
3999.260 | 9197.00 | 8938.00 | 111.10 | FTFTTFTFFFFFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-2265
Executing tool marcie
Input is S_ResAllocation-PT-R015C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r218st-ebro-143344930401147
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-0
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-1
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-15
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-2
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-3
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-4
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-5
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-6
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-7
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-8
FORMULA_NAME ResAllocation-PT-R015C002-CTLFireability-9
=== Now, execution of the tool begins
BK_START 1433783126336
Model: S_ResAllocation-PT-R015C002
reachability algorithm:
Saturation-based algorithm
variable ordering algorithm:
Calculated like in [Noa99]
--memory=6 --suppress --rs-algorithm=3 --place-order=5
Marcie rev. 1429:1432M (built: crohr on 2014-10-22)
A model checker for Generalized Stochastic Petri nets
authors: Alex Tovchigrechko (IDD package and CTL model checking)
Martin Schwarick (Symbolic numerical analysis and CSL model checking)
Christian Rohr (Simulative and approximative numerical model checking)
marcie@informatik.tu-cottbus.de
called as: marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --suppress --rs-algorithm=3 --place-order=5
parse successfull
net created successfully
(NrP: 60 NrTr: 32 NrArc: 150)
net check time: 0m0sec
parse formulas successfull
formulas created successfully
place and transition orderings generation:0m0sec
init dd package: 0m5sec
RS generation: 0m0sec
-> reachability set: #nodes 160 (1.6e+02) #states 278,528 (5)
starting MCC model checker
--------------------------
checking: [~ [~ [~ [[[IS-FIREABLE [t_1_9] & IS-FIREABLE [t_0_7]] & [IS-FIREABLE [t_1_2] | IS-FIREABLE [t_0_11]]]]]] & ~ [EF [[[IS-FIREABLE [t_0_11] | IS-FIREABLE [t_1_10]] & [IS-FIREABLE [t_1_1] & IS-FIREABLE [t_1_4]]]]]]
normalized: [~ [[[IS-FIREABLE [t_1_2] | IS-FIREABLE [t_0_11]] & [IS-FIREABLE [t_1_9] & IS-FIREABLE [t_0_7]]]] & ~ [E [true U [[IS-FIREABLE [t_0_11] | IS-FIREABLE [t_1_10]] & [IS-FIREABLE [t_1_1] & IS-FIREABLE [t_1_4]]]]]]
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-0 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: EF [[EG [~ [IS-FIREABLE [t_1_0]]] & ~ [~ [[IS-FIREABLE [t_1_15] | IS-FIREABLE [t_1_12]]]]]]
normalized: E [true U [[IS-FIREABLE [t_1_15] | IS-FIREABLE [t_1_12]] & EG [~ [IS-FIREABLE [t_1_0]]]]]
.
EG iterations: 1
-> the formula is TRUE
FORMULA ResAllocation-PT-R015C002-CTLFireability-1 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: A [EF [~ [IS-FIREABLE [t_1_10]]] U [[[IS-FIREABLE [t_0_3] | IS-FIREABLE [t_1_11]] & [IS-FIREABLE [t_1_14] | IS-FIREABLE [t_1_10]]] & ~ [[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_1_9]]]]]
normalized: [~ [EG [~ [[~ [[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_1_9]]] & [[IS-FIREABLE [t_1_14] | IS-FIREABLE [t_1_10]] & [IS-FIREABLE [t_0_3] | IS-FIREABLE [t_1_11]]]]]]] & ~ [E [~ [E [true U ~ [IS-FIREABLE [t_1_10]]]] U [~ [E [true U ~ [IS-FIREABLE [t_1_10]]]] & ~ [[~ [[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_1_9]]] & [[IS-FIREABLE [t_1_14] | IS-FIREABLE [t_1_10]] & [IS-FIREABLE [t_0_3] | IS-FIREABLE [t_1_11]]]]]]]]]
.
EG iterations: 1
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-2 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: A [~ [IS-FIREABLE [t_1_0]] U ~ [[~ [IS-FIREABLE [t_1_8]] & ~ [IS-FIREABLE [t_1_0]]]]]
normalized: [~ [EG [[~ [IS-FIREABLE [t_1_0]] & ~ [IS-FIREABLE [t_1_8]]]]] & ~ [E [IS-FIREABLE [t_1_0] U [IS-FIREABLE [t_1_0] & [~ [IS-FIREABLE [t_1_0]] & ~ [IS-FIREABLE [t_1_8]]]]]]]
.............................................
EG iterations: 45
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-3 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: EF [AG [~ [~ [IS-FIREABLE [t_0_0]]]]]
normalized: E [true U ~ [E [true U ~ [IS-FIREABLE [t_0_0]]]]]
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-4 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: ~ [AG [~ [[[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_0_7]] & ~ [IS-FIREABLE [t_0_7]]]]]]
normalized: E [true U [~ [IS-FIREABLE [t_0_7]] & [IS-FIREABLE [t_0_14] & IS-FIREABLE [t_0_7]]]]
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-5 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: E [IS-FIREABLE [t_1_10] U AF [IS-FIREABLE [t_0_15]]]
normalized: E [IS-FIREABLE [t_1_10] U ~ [EG [~ [IS-FIREABLE [t_0_15]]]]]
.
EG iterations: 1
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-6 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: AF [IS-FIREABLE [t_0_5]]
normalized: ~ [EG [~ [IS-FIREABLE [t_0_5]]]]
...............................................
EG iterations: 47
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-7 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: [[[[EX [IS-FIREABLE [t_1_2]] & ~ [~ [IS-FIREABLE [t_1_11]]]] | [[[IS-FIREABLE [t_0_3] | IS-FIREABLE [t_1_1]] | IS-FIREABLE [t_1_0]] | IS-FIREABLE [t_1_4]]] & [~ [[IS-FIREABLE [t_1_0] & [IS-FIREABLE [t_1_10] & IS-FIREABLE [t_1_7]]]] & IS-FIREABLE [t_1_5]]] | ~ [A [~ [IS-FIREABLE [t_1_1]] U IS-FIREABLE [t_1_8]]]]
normalized: [~ [[~ [EG [~ [IS-FIREABLE [t_1_8]]]] & ~ [E [IS-FIREABLE [t_1_1] U [IS-FIREABLE [t_1_1] & ~ [IS-FIREABLE [t_1_8]]]]]]] | [[IS-FIREABLE [t_1_5] & ~ [[IS-FIREABLE [t_1_0] & [IS-FIREABLE [t_1_10] & IS-FIREABLE [t_1_7]]]]] & [[IS-FIREABLE [t_1_4] | [IS-FIREABLE [t_1_0] | [IS-FIREABLE [t_0_3] | IS-FIREABLE [t_1_1]]]] | [IS-FIREABLE [t_1_11] & EX [IS-FIREABLE [t_1_2]]]]]]
.............................................
EG iterations: 44
-> the formula is TRUE
FORMULA ResAllocation-PT-R015C002-CTLFireability-8 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: A [EX [~ [IS-FIREABLE [t_0_5]]] U EG [IS-FIREABLE [t_1_13]]]
normalized: [~ [EG [~ [EG [IS-FIREABLE [t_1_13]]]]] & ~ [E [~ [EX [~ [IS-FIREABLE [t_0_5]]]] U [~ [EX [~ [IS-FIREABLE [t_0_5]]]] & ~ [EG [IS-FIREABLE [t_1_13]]]]]]]
...............................................................................................................................................................
EG iterations: 159
.................................................................................................................................................................
EG iterations: 159
EG iterations: 0
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-9 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: [[AF [IS-FIREABLE [t_1_1]] | EX [IS-FIREABLE [t_0_2]]] & EF [EG [[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_1_12]]]]]
normalized: [E [true U EG [[IS-FIREABLE [t_0_14] & IS-FIREABLE [t_1_12]]]] & [EX [IS-FIREABLE [t_0_2]] | ~ [EG [~ [IS-FIREABLE [t_1_1]]]]]]
.............................................................................................
EG iterations: 93
..
EG iterations: 1
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: EG [~ [AF [IS-FIREABLE [t_0_6]]]]
normalized: EG [EG [~ [IS-FIREABLE [t_0_6]]]]
............................................
EG iterations: 44
.
EG iterations: 1
-> the formula is TRUE
FORMULA ResAllocation-PT-R015C002-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: ~ [AG [EX [~ [IS-FIREABLE [t_1_10]]]]]
normalized: E [true U ~ [EX [~ [IS-FIREABLE [t_1_10]]]]]
.-> the formula is TRUE
FORMULA ResAllocation-PT-R015C002-CTLFireability-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: E [~ [IS-FIREABLE [t_1_12]] U IS-FIREABLE [t_1_3]]
normalized: E [~ [IS-FIREABLE [t_1_12]] U IS-FIREABLE [t_1_3]]
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: EG [~ [~ [EF [IS-FIREABLE [t_0_8]]]]]
normalized: EG [E [true U IS-FIREABLE [t_0_8]]]
.................................................................................................
EG iterations: 97
-> the formula is TRUE
FORMULA ResAllocation-PT-R015C002-CTLFireability-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
checking: [AF [A [IS-FIREABLE [t_1_7] U IS-FIREABLE [t_1_0]]] & EF [[[[IS-FIREABLE [t_1_14] & IS-FIREABLE [t_1_15]] & [IS-FIREABLE [t_0_1] & IS-FIREABLE [t_0_12]]] & [~ [IS-FIREABLE [t_1_2]] | [IS-FIREABLE [t_0_1] & IS-FIREABLE [t_1_0]]]]]]
normalized: [E [true U [[[IS-FIREABLE [t_0_1] & IS-FIREABLE [t_1_0]] | ~ [IS-FIREABLE [t_1_2]]] & [[IS-FIREABLE [t_0_1] & IS-FIREABLE [t_0_12]] & [IS-FIREABLE [t_1_14] & IS-FIREABLE [t_1_15]]]]] & ~ [EG [~ [[~ [EG [~ [IS-FIREABLE [t_1_0]]]] & ~ [E [~ [IS-FIREABLE [t_1_7]] U [~ [IS-FIREABLE [t_1_7]] & ~ [IS-FIREABLE [t_1_0]]]]]]]]]]
.
EG iterations: 1
.
EG iterations: 1
-> the formula is FALSE
FORMULA ResAllocation-PT-R015C002-CTLFireability-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m0sec
Total processing time: 0m9sec
BK_STOP 1433783135533
--------------------
content from stderr:
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok
initing FirstDep: 0m0sec
iterations count:871 (27), effective:240 (7)
initing FirstDep: 0m0sec
iterations count:588 (18), effective:162 (5)
iterations count:76 (2), effective:16 (0)
iterations count:35 (1), effective:1 (0)
iterations count:35 (1), effective:1 (0)
iterations count:458 (14), effective:121 (3)
iterations count:32 (1), effective:0 (0)
iterations count:35 (1), effective:1 (0)
iterations count:32 (1), effective:0 (0)
292
iterations count:1921 (60), effective:558 (17)
iterations count:64 (2), effective:11 (0)
iterations count:216 (6), effective:60 (1)
iterations count:34 (1), effective:1 (0)
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_ResAllocation-PT-R015C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/users/gast00/fkordon/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/S_ResAllocation-PT-R015C002.tgz
mv S_ResAllocation-PT-R015C002 execution
# this is for BenchKit: explicit launching of the test
cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2265"
echo " Executing tool marcie"
echo " Input is S_ResAllocation-PT-R015C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r218st-ebro-143344930401147"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "ReachabilityComputeBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;