Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-2270
Executing tool marcie
Input is S_ParamProductionCell-PT-0, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r204st-blw3-143341204400003
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-0
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-1
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-15
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-2
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-3
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-4
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-5
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-6
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-7
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-8
FORMULA_NAME ParamProductionCell-PT-0-CTLFireability-9

=== Now, execution of the tool begins

BK_START 1433630751983

Model: S_ParamProductionCell-PT-0
reachability algorithm:
Saturation-based algorithm
variable ordering algorithm:
Calculated like in [Noa99]
--memory=6 --suppress --rs-algorithm=3 --place-order=5

Marcie rev. 1429:1432M (built: crohr on 2014-10-22)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --suppress --rs-algorithm=3 --place-order=5

parse successfull
net created successfully

(NrP: 198 NrTr: 176 NrArc: 730)

net check time: 0m0sec

parse formulas successfull
formulas created successfully
place and transition orderings generation:0m0sec

init dd package: 0m2sec


RS generation: 0m3sec


-> reachability set: #nodes 14351 (1.4e+04) #states 2,776,936 (6)



starting MCC model checker
--------------------------

checking: ~ [~ [[[~ [~ [IS-FIREABLE [A2U_c1]]] & [[IS-FIREABLE [TU_lift_csc] | IS-FIREABLE [A1L_rot3_Cstop]] | ~ [IS-FIREABLE [A2L_rot3_Pstop]]]] | AF [[IS-FIREABLE [deposit_belt_lock_input_area] & IS-FIREABLE [arm1_unlock_swivel_1]]]]]]
normalized: [[IS-FIREABLE [A2U_c1] & [[IS-FIREABLE [TU_lift_csc] | IS-FIREABLE [A1L_rot3_Cstop]] | ~ [IS-FIREABLE [A2L_rot3_Pstop]]]] | ~ [EG [~ [[IS-FIREABLE [deposit_belt_lock_input_area] & IS-FIREABLE [arm1_unlock_swivel_1]]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-0 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AF [AX [[[IS-FIREABLE [forge_Pstop] | IS-FIREABLE [DB_deliver_Cstop]] | IS-FIREABLE [arm2_lock_output_area]]]]
normalized: ~ [EG [EX [~ [[IS-FIREABLE [arm2_lock_output_area] | [IS-FIREABLE [forge_Pstop] | IS-FIREABLE [DB_deliver_Cstop]]]]]]]

.........
EG iterations: 8
-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-1 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EG [EX [~ [IS-FIREABLE [PU_lower_Cstop]]]]
normalized: EG [EX [~ [IS-FIREABLE [PU_lower_Cstop]]]]

........
EG iterations: 7
-> the formula is TRUE

FORMULA ParamProductionCell-PT-0-CTLFireability-2 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [EF [~ [IS-FIREABLE [A1L_rot1_Pstart]]] U EX [[IS-FIREABLE [A2U_rot2_Pstart] | IS-FIREABLE [A1L_c2]]]]
normalized: [~ [E [~ [E [true U ~ [IS-FIREABLE [A1L_rot1_Pstart]]]] U [~ [EX [[IS-FIREABLE [A2U_rot2_Pstart] | IS-FIREABLE [A1L_c2]]]] & ~ [E [true U ~ [IS-FIREABLE [A1L_rot1_Pstart]]]]]]] & ~ [EG [~ [EX [[IS-FIREABLE [A2U_rot2_Pstart] | IS-FIREABLE [A1L_c2]]]]]]]

..............................................
EG iterations: 45
.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-3 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec

checking: ~ [EF [EX [IS-FIREABLE [PU_lower_Cstop]]]]
normalized: ~ [E [true U EX [IS-FIREABLE [PU_lower_Cstop]]]]

.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-4 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec

checking: ~ [[EX [EF [IS-FIREABLE [feed_belt_unlock_input_area]]] & ~ [[AF [IS-FIREABLE [A2L_rot2_Cstop]] | EG [IS-FIREABLE [DB_trans_Cstop]]]]]]
normalized: ~ [[EX [E [true U IS-FIREABLE [feed_belt_unlock_input_area]]] & ~ [[EG [IS-FIREABLE [DB_trans_Cstop]] | ~ [EG [~ [IS-FIREABLE [A2L_rot2_Cstop]]]]]]]]

.............................................................
EG iterations: 61
.............................................................................................................................................................................................................................................................................................
EG iterations: 285
.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-5 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m9sec

checking: AG [[AX [~ [IS-FIREABLE [A1U_ext_Cstop]]] | AF [~ [IS-FIREABLE [A2U_rot1_Pstop]]]]]
normalized: ~ [E [true U ~ [[~ [EX [IS-FIREABLE [A1U_ext_Cstop]]] | ~ [EG [IS-FIREABLE [A2U_rot1_Pstop]]]]]]]

......................................................
EG iterations: 54
.-> the formula is TRUE

FORMULA ParamProductionCell-PT-0-CTLFireability-6 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [AG [EX [IS-FIREABLE [A2U_rot3_Pstop]]]]
normalized: E [true U ~ [E [true U ~ [EX [IS-FIREABLE [A2U_rot3_Pstop]]]]]]

.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-7 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: [EF [IS-FIREABLE [DB_deliver_Pstart]] | IS-FIREABLE [PL_lower_Cstop]]
normalized: [IS-FIREABLE [PL_lower_Cstop] | E [true U IS-FIREABLE [DB_deliver_Pstart]]]

-> the formula is TRUE

FORMULA ParamProductionCell-PT-0-CTLFireability-8 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec

checking: [[[~ [AX [IS-FIREABLE [A1L_rot1_Cstop]]] | [EF [IS-FIREABLE [A2L_rot3_csc]] & [~ [IS-FIREABLE [A2L_rot3_Pstart]] & ~ [IS-FIREABLE [A2L_rot2_Pstop]]]]] | [A [IS-FIREABLE [A1L_ret_Pstop] U IS-FIREABLE [p_t1]] & IS-FIREABLE [A2L_rot1_csc]]] & A [EF [IS-FIREABLE [arm2_unlock_output_area]] U [IS-FIREABLE [A2L_rot1_Cstop] | IS-FIREABLE [A2U_rot2_Pstop]]]]
normalized: [[~ [EG [~ [[IS-FIREABLE [A2L_rot1_Cstop] | IS-FIREABLE [A2U_rot2_Pstop]]]]] & ~ [E [~ [E [true U IS-FIREABLE [arm2_unlock_output_area]]] U [~ [E [true U IS-FIREABLE [arm2_unlock_output_area]]] & ~ [[IS-FIREABLE [A2L_rot1_Cstop] | IS-FIREABLE [A2U_rot2_Pstop]]]]]]] & [[IS-FIREABLE [A2L_rot1_csc] & [~ [EG [~ [IS-FIREABLE [p_t1]]]] & ~ [E [~ [IS-FIREABLE [A1L_ret_Pstop]] U [~ [IS-FIREABLE [A1L_ret_Pstop]] & ~ [IS-FIREABLE [p_t1]]]]]]] | [[[~ [IS-FIREABLE [A2L_rot2_Pstop]] & ~ [IS-FIREABLE [A2L_rot3_Pstart]]] & E [true U IS-FIREABLE [A2L_rot3_csc]]] | EX [~ [IS-FIREABLE [A1L_rot1_Cstop]]]]]]

...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................
EG iterations: 458
........................................................................................
EG iterations: 88
-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-9 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m42sec

checking: ~ [AX [[AF [IS-FIREABLE [A1U_ungrasp]] | AF [IS-FIREABLE [A2L_rot3_Pstart]]]]]
normalized: EX [~ [[~ [EG [~ [IS-FIREABLE [A2L_rot3_Pstart]]]] | ~ [EG [~ [IS-FIREABLE [A1U_ungrasp]]]]]]]

................................................................................................................................................................................................................................
EG iterations: 224
......................................................................................................................
EG iterations: 118
.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m34sec

checking: EF [IS-FIREABLE [A2U_ext_Cstop]]
normalized: E [true U IS-FIREABLE [A2U_ext_Cstop]]

-> the formula is TRUE

FORMULA ParamProductionCell-PT-0-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: [[E [IS-FIREABLE [A1U_ext_Cstop] U [IS-FIREABLE [press_lock_input_area] | IS-FIREABLE [A2U_rot3_Pstart]]] & [[[IS-FIREABLE [A2U_ret_Pstart] | IS-FIREABLE [press_lock_output_area]] & IS-FIREABLE [A1L_rot1_csc]] | ~ [[IS-FIREABLE [A2L_rot3_csc] & [IS-FIREABLE [A2U_rot2_Pstart] & IS-FIREABLE [arm1_lock_swivel_1]]]]]] | [AF [IS-FIREABLE [A1U_rot2_Pstart]] & ~ [AX [[IS-FIREABLE [A2L_c2] | IS-FIREABLE [table_unlock_output_area]]]]]]
normalized: [[EX [~ [[IS-FIREABLE [A2L_c2] | IS-FIREABLE [table_unlock_output_area]]]] & ~ [EG [~ [IS-FIREABLE [A1U_rot2_Pstart]]]]] | [[~ [[IS-FIREABLE [A2L_rot3_csc] & [IS-FIREABLE [A2U_rot2_Pstart] & IS-FIREABLE [arm1_lock_swivel_1]]]] | [IS-FIREABLE [A1L_rot1_csc] & [IS-FIREABLE [A2U_ret_Pstart] | IS-FIREABLE [press_lock_output_area]]]] & E [IS-FIREABLE [A1U_ext_Cstop] U [IS-FIREABLE [press_lock_input_area] | IS-FIREABLE [A2U_rot3_Pstart]]]]]

...........................................................
EG iterations: 59
.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m2sec

checking: AF [AG [[IS-FIREABLE [TL_rot_Pstart] & IS-FIREABLE [FB_deliver_csc]]]]
normalized: ~ [EG [E [true U ~ [[IS-FIREABLE [TL_rot_Pstart] & IS-FIREABLE [FB_deliver_csc]]]]]]


EG iterations: 0
-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EG [~ [[[[IS-FIREABLE [A1U_rot3_Cstop] | IS-FIREABLE [forge_csc]] & ~ [IS-FIREABLE [TL_lower_Cstop]]] & ~ [[IS-FIREABLE [A1U_ret_Pstart] & IS-FIREABLE [forge_csc]]]]]]
normalized: EG [~ [[~ [[IS-FIREABLE [A1U_ret_Pstart] & IS-FIREABLE [forge_csc]]] & [~ [IS-FIREABLE [TL_lower_Cstop]] & [IS-FIREABLE [A1U_rot3_Cstop] | IS-FIREABLE [forge_csc]]]]]]

....................................................................................
EG iterations: 84
-> the formula is TRUE

FORMULA ParamProductionCell-PT-0-CTLFireability-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m4sec

checking: [[AX [EG [IS-FIREABLE [A2L_ext_Pstop]]] | AG [~ [IS-FIREABLE [A2L_c3]]]] & ~ [AG [~ [[IS-FIREABLE [A1U_c2] & IS-FIREABLE [A2L_rot2_Pstart]]]]]]
normalized: [E [true U [IS-FIREABLE [A1U_c2] & IS-FIREABLE [A2L_rot2_Pstart]]] & [~ [E [true U IS-FIREABLE [A2L_c3]]] | ~ [EX [~ [EG [IS-FIREABLE [A2L_ext_Pstop]]]]]]]

...........................................................
EG iterations: 59
.-> the formula is FALSE

FORMULA ParamProductionCell-PT-0-CTLFireability-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec


Total processing time: 1m52sec


BK_STOP 1433630864791

--------------------
content from stderr:

check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m0sec

1110 2462 4320 5974 7898 9368 11426 12423 12737 14206 14576 16278 15618 15366 16389 15347 15728 15417 16046 14555 14613
iterations count:21333 (121), effective:1085 (6)

initing FirstDep: 0m0sec


iterations count:203 (1), effective:1 (0)

iterations count:203 (1), effective:1 (0)
10218 11213 11937 14174 14311
iterations count:5198 (29), effective:254 (1)
13235 13971 14996 15352 14978
iterations count:5245 (29), effective:259 (1)

iterations count:253 (1), effective:15 (0)
15010 16090 16692 14800
iterations count:4507 (25), effective:237 (1)
6332 8063 10575 12285 13676 14225
iterations count:6803 (38), effective:349 (1)

iterations count:178 (1), effective:1 (0)
6402 10386 13608 14455
iterations count:4506 (25), effective:237 (1)
6402 10386 13608 14455
iterations count:4506 (25), effective:237 (1)
6647 10665 14119 14745
iterations count:4848 (27), effective:251 (1)

iterations count:176 (1), effective:0 (0)

iterations count:176 (1), effective:0 (0)
5948 7889 10383 12245 13572 14051
iterations count:6893 (39), effective:351 (1)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_ParamProductionCell-PT-0"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/user/u8/hulinhub/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_ParamProductionCell-PT-0.tgz
mv S_ParamProductionCell-PT-0 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2270"
echo " Executing tool marcie"
echo " Input is S_ParamProductionCell-PT-0, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r204st-blw3-143341204400003"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "ReachabilityComputeBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;