Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.............
=====================================================================
Generated by BenchKit 2-2265
Executing tool marcie
Input is S_CircadianClock-PT-000001, examination is CTLFireabilitySimple
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r120st-ebro-143297419500264
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-0
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-1
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-10
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-11
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-12
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-13
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-14
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-15
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-2
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-3
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-4
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-5
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-6
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-7
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-8
FORMULA_NAME CircadianClock-PT-000001-CTLFireabilitySimple-9

=== Now, execution of the tool begins

BK_START 1433162550834

Model: S_CircadianClock-PT-000001
reachability algorithm:
Saturation-based algorithm
variable ordering algorithm:
Calculated like in [Noa99]
--memory=6 --suppress --rs-algorithm=3 --place-order=5

Marcie rev. 1429:1432M (built: crohr on 2014-10-22)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireabilitySimple.xml --memory=6 --suppress --rs-algorithm=3 --place-order=5

parse successfull
net created successfully

(NrP: 14 NrTr: 16 NrArc: 58)

net check time: 0m0sec

parse formulas successfull
formulas created successfully
place and transition orderings generation:0m0sec

init dd package: 0m7sec


RS generation: 0m0sec


-> reachability set: #nodes 21 (2.1e+01) #states 128



starting MCC model checker
--------------------------

checking: E [IS-FIREABLE [deg_ma] U IS-FIREABLE [bind_r]]
normalized: E [IS-FIREABLE [deg_ma] U IS-FIREABLE [bind_r]]

-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-0 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [deactive]]
normalized: ~ [E [true U ~ [IS-FIREABLE [deactive]]]]

-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-1 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [transl_a]]
normalized: E [true U IS-FIREABLE [transl_a]]

-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-2 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AX [IS-FIREABLE [deg_c]]
normalized: ~ [EX [~ [IS-FIREABLE [deg_c]]]]

.-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-3 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [IS-FIREABLE [transc_da_a] U IS-FIREABLE [transc_da_a]]
normalized: [~ [EG [~ [IS-FIREABLE [transc_da_a]]]] & ~ [E [~ [IS-FIREABLE [transc_da_a]] U [~ [IS-FIREABLE [transc_da_a]] & ~ [IS-FIREABLE [transc_da_a]]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-4 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [rel_a]]
normalized: E [true U IS-FIREABLE [rel_a]]

-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-5 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EG [IS-FIREABLE [deg_ma]]
normalized: EG [IS-FIREABLE [deg_ma]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-6 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EX [IS-FIREABLE [transc_da]]
normalized: EX [IS-FIREABLE [transc_da]]

.-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-7 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AF [IS-FIREABLE [transl_r]]
normalized: ~ [EG [~ [IS-FIREABLE [transl_r]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-8 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [transl_a]]
normalized: ~ [E [true U ~ [IS-FIREABLE [transl_a]]]]

-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-9 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AG [IS-FIREABLE [deg_r]]
normalized: ~ [E [true U ~ [IS-FIREABLE [deg_r]]]]

-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: E [IS-FIREABLE [deactive] U IS-FIREABLE [transc_dr]]
normalized: E [IS-FIREABLE [deactive] U IS-FIREABLE [transc_dr]]

-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AF [IS-FIREABLE [transc_dr]]
normalized: ~ [EG [~ [IS-FIREABLE [transc_dr]]]]

.
EG iterations: 1
-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: EF [IS-FIREABLE [transl_r]]
normalized: E [true U IS-FIREABLE [transl_r]]

-> the formula is TRUE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: A [IS-FIREABLE [transc_da] U IS-FIREABLE [deg_r]]
normalized: [~ [EG [~ [IS-FIREABLE [deg_r]]]] & ~ [E [~ [IS-FIREABLE [transc_da]] U [~ [IS-FIREABLE [transc_da]] & ~ [IS-FIREABLE [deg_r]]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AF [IS-FIREABLE [rel_a]]
normalized: ~ [EG [~ [IS-FIREABLE [rel_a]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA CircadianClock-PT-000001-CTLFireabilitySimple-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec


Total processing time: 0m10sec


BK_STOP 1433162561579

--------------------
content from stderr:

check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m0sec


iterations count:104 (6), effective:19 (1)

initing FirstDep: 0m0sec


iterations count:54 (3), effective:8 (0)

iterations count:18 (1), effective:1 (0)

iterations count:74 (4), effective:14 (0)

iterations count:16 (1), effective:0 (0)

iterations count:63 (3), effective:10 (0)

iterations count:36 (2), effective:3 (0)

iterations count:18 (1), effective:1 (0)

iterations count:17 (1), effective:1 (0)

iterations count:23 (1), effective:3 (0)

iterations count:18 (1), effective:1 (0)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_CircadianClock-PT-000001"
export BK_EXAMINATION="CTLFireabilitySimple"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/users/gast00/fkordon/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_CircadianClock-PT-000001.tgz
mv S_CircadianClock-PT-000001 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2265"
echo " Executing tool marcie"
echo " Input is S_CircadianClock-PT-000001, examination is CTLFireabilitySimple"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r120st-ebro-143297419500264"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireabilitySimple" = "ReachabilityComputeBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireabilitySimple" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireabilitySimple.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireabilitySimple.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireabilitySimple.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireabilitySimple.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;