Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......
=====================================================================
Generated by BenchKit 2-2265
Executing tool marcie
Input is ParamProductionCell-PT-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r064kn-blw3-143254880200029
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-0
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-1
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-15
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-2
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-3
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-4
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-5
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-6
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-7
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-8
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-9

=== Now, execution of the tool begins

BK_START 1432724935705

Model: ParamProductionCell-PT-2
reachability algorithm:
Saturation-based algorithm
variable ordering algorithm:
Calculated like in [Noa99]
--memory=6 --suppress --rs-algorithm=3 --place-order=5

Marcie rev. 1429:1432M (built: crohr on 2014-10-22)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --suppress --rs-algorithm=3 --place-order=5

parse successfull
net created successfully

(NrP: 231 NrTr: 202 NrArc: 846)

net check time: 0m0sec

parse formulas successfull
formulas created successfully
place and transition orderings generation:0m0sec

init dd package: 0m2sec


RS generation: 0m3sec


-> reachability set: #nodes 33876 (3.4e+04) #states 349,874 (5)



starting MCC model checker
--------------------------

checking: [[~ [AG [IS-FIREABLE [A2L_ret_Pstart]]] & AF [[[IS-FIREABLE [TL_lower_Pstop] & IS-FIREABLE [arm2_lock_input_area]] & [IS-FIREABLE [arm2_lock_swivel_1] & IS-FIREABLE [DB_deliver_Cstop]]]]] & ~ [[IS-FIREABLE [A1U_rot2_Pstart] | [IS-FIREABLE [A1U_rot2_Pstop] | AF [IS-FIREABLE [arm1_lock_input_area]]]]]]
normalized: [[E [true U ~ [IS-FIREABLE [A2L_ret_Pstart]]] & ~ [EG [~ [[[IS-FIREABLE [TL_lower_Pstop] & IS-FIREABLE [arm2_lock_input_area]] & [IS-FIREABLE [arm2_lock_swivel_1] & IS-FIREABLE [DB_deliver_Cstop]]]]]]] & ~ [[IS-FIREABLE [A1U_rot2_Pstart] | [IS-FIREABLE [A1U_rot2_Pstop] | ~ [EG [~ [IS-FIREABLE [arm1_lock_input_area]]]]]]]]

....................................................................................................................................................................................................................................................................
EG iterations: 260

EG iterations: 0
-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-0 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m34sec

checking: ~ [AF [[AF [IS-FIREABLE [CU_ungrasp]] & ~ [~ [IS-FIREABLE [A2L_rot1_Pstop]]]]]]
normalized: EG [~ [[IS-FIREABLE [A2L_rot1_Pstop] & ~ [EG [~ [IS-FIREABLE [CU_ungrasp]]]]]]]

..................................................................................................................................................................................................................................................................................................
EG iterations: 290
.............................................
EG iterations: 45
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-1 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m27sec

checking: AF [IS-FIREABLE [A2U_rot1_Pstart]]
normalized: ~ [EG [~ [IS-FIREABLE [A2U_rot1_Pstart]]]]

....................
EG iterations: 20
-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-2 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: AF [[A [IS-FIREABLE [A2U_rot3_Pstart] U IS-FIREABLE [A1U_rot2_Pstart]] & [IS-FIREABLE [A2L_rot3_Cstop] & AG [IS-FIREABLE [feed_belt_unlock_output_area]]]]]
normalized: ~ [EG [~ [[[IS-FIREABLE [A2L_rot3_Cstop] & ~ [E [true U ~ [IS-FIREABLE [feed_belt_unlock_output_area]]]]] & [~ [EG [~ [IS-FIREABLE [A1U_rot2_Pstart]]]] & ~ [E [~ [IS-FIREABLE [A2U_rot3_Pstart]] U [~ [IS-FIREABLE [A2U_rot3_Pstart]] & ~ [IS-FIREABLE [A1U_rot2_Pstart]]]]]]]]]]

...............
EG iterations: 15

EG iterations: 0
-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-3 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec

checking: AG [EF [[~ [IS-FIREABLE [A2L_rot1_Pstart]] | [IS-FIREABLE [CU_ungrasp] | IS-FIREABLE [A1L_ret_Pstart]]]]]
normalized: ~ [E [true U ~ [E [true U [~ [IS-FIREABLE [A2L_rot1_Pstart]] | [IS-FIREABLE [CU_ungrasp] | IS-FIREABLE [A1L_ret_Pstart]]]]]]]

-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-4 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m0sec

checking: [AF [E [IS-FIREABLE [FB_trans_Cstop] U IS-FIREABLE [deposit_belt_unlock_output_area]]] & ~ [IS-FIREABLE [A1L_c1]]]
normalized: [~ [EG [~ [E [IS-FIREABLE [FB_trans_Cstop] U IS-FIREABLE [deposit_belt_unlock_output_area]]]]] & ~ [IS-FIREABLE [A1L_c1]]]

......................................................................................................................................................................................................
EG iterations: 198
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-5 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m39sec

checking: [~ [IS-FIREABLE [CL_lower_Pstop]] & AF [IS-FIREABLE [A2U_ext_Pstop]]]
normalized: [~ [EG [~ [IS-FIREABLE [A2U_ext_Pstop]]]] & ~ [IS-FIREABLE [CL_lower_Pstop]]]

...............................................................................................................................................................................................................................................................................................
EG iterations: 287
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-6 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m36sec

checking: ~ [EF [~ [~ [[IS-FIREABLE [arm2_unlock_input_area] | IS-FIREABLE [A1U_rot1_Pstop]]]]]]
normalized: ~ [E [true U [IS-FIREABLE [arm2_unlock_input_area] | IS-FIREABLE [A1U_rot1_Pstop]]]]

-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-7 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m4sec

checking: AX [[EF [[IS-FIREABLE [A1U_rot1_csc] | IS-FIREABLE [A2U_ret_Pstart]]] & AF [~ [IS-FIREABLE [CL_lower_Pstart]]]]]
normalized: ~ [EX [~ [[~ [EG [IS-FIREABLE [CL_lower_Pstart]]] & E [true U [IS-FIREABLE [A1U_rot1_csc] | IS-FIREABLE [A2U_ret_Pstart]]]]]]]

.............................................................................................................................................
EG iterations: 141
.-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-8 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m5sec

checking: AG [AF [EG [IS-FIREABLE [forge_Pstart]]]]
normalized: ~ [E [true U EG [~ [EG [IS-FIREABLE [forge_Pstart]]]]]]

.............................................................................................................................
EG iterations: 125

EG iterations: 0
-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-9 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m2sec

checking: E [AF [~ [IS-FIREABLE [DB_trans_Cstop]]] U AX [[IS-FIREABLE [A1L_rot3_Cstop] | IS-FIREABLE [A2L_ext_Pstop]]]]
normalized: E [~ [EG [IS-FIREABLE [DB_trans_Cstop]]] U ~ [EX [~ [[IS-FIREABLE [A1L_rot3_Cstop] | IS-FIREABLE [A2L_ext_Pstop]]]]]]

..........................................................................................................................................
EG iterations: 137
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m4sec

checking: AG [EG [AF [IS-FIREABLE [CU_trans_csc]]]]
normalized: ~ [E [true U ~ [EG [~ [EG [~ [IS-FIREABLE [CU_trans_csc]]]]]]]]

..................................................................................................................................................................................................................................................................................................
EG iterations: 290

EG iterations: 0
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m32sec

checking: EF [IS-FIREABLE [forge_Pstart]]
normalized: E [true U IS-FIREABLE [forge_Pstart]]

-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m2sec

checking: E [~ [AG [IS-FIREABLE [A1U_ext_csc]]] U IS-FIREABLE [A2U_rot3_Cstop]]
normalized: E [E [true U ~ [IS-FIREABLE [A1U_ext_csc]]] U IS-FIREABLE [A2U_rot3_Cstop]]

-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m1sec

checking: [[AG [[~ [IS-FIREABLE [A2L_rot2_Cstop]] | IS-FIREABLE [TL_rot_Cstop]]] | AX [EG [IS-FIREABLE [feed_belt_unlock_output_area]]]] & AF [AF [~ [IS-FIREABLE [CU_ungrasp]]]]]
normalized: [~ [EG [EG [IS-FIREABLE [CU_ungrasp]]]] & [~ [EX [~ [EG [IS-FIREABLE [feed_belt_unlock_output_area]]]]] | ~ [E [true U ~ [[IS-FIREABLE [TL_rot_Cstop] | ~ [IS-FIREABLE [A2L_rot2_Cstop]]]]]]]]

...................................................................................................................................................................................................................................
EG iterations: 227
...................................................................................................................................
EG iterations: 130
.
EG iterations: 1
-> the formula is FALSE

FORMULA ParamProductionCell-PT-2-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m25sec

checking: [E [EX [IS-FIREABLE [A2L_rot1_Cstop]] U AF [IS-FIREABLE [CL_lift_Pstart]]] | [A [[IS-FIREABLE [A1U_rot2_Pstart] | IS-FIREABLE [FB_trans_Cstop]] U ~ [IS-FIREABLE [TL_rot_Pstop]]] & [AF [[IS-FIREABLE [crane_unlock_input_area] & IS-FIREABLE [A2L_rot1_Cstop]]] & A [IS-FIREABLE [A1U_ret_Pstop] U IS-FIREABLE [TU_rot_csc]]]]]
normalized: [[[[~ [EG [~ [IS-FIREABLE [TU_rot_csc]]]] & ~ [E [~ [IS-FIREABLE [A1U_ret_Pstop]] U [~ [IS-FIREABLE [TU_rot_csc]] & ~ [IS-FIREABLE [A1U_ret_Pstop]]]]]] & ~ [EG [~ [[IS-FIREABLE [crane_unlock_input_area] & IS-FIREABLE [A2L_rot1_Cstop]]]]]] & [~ [EG [IS-FIREABLE [TL_rot_Pstop]]] & ~ [E [~ [[IS-FIREABLE [A1U_rot2_Pstart] | IS-FIREABLE [FB_trans_Cstop]]] U [IS-FIREABLE [TL_rot_Pstop] & ~ [[IS-FIREABLE [A1U_rot2_Pstart] | IS-FIREABLE [FB_trans_Cstop]]]]]]]] | E [EX [IS-FIREABLE [A2L_rot1_Cstop]] U ~ [EG [~ [IS-FIREABLE [CL_lift_Pstart]]]]]]

.............................................................................................................................................................................................................................................................................................................
EG iterations: 301
.
before gc: list nodes free: 1260565

after gc: idd nodes used:55330, unused:63944670; list nodes free:284972616
.....................................................................................................................................................................................................
EG iterations: 197

EG iterations: 0
............................................................................................................................................................................................................................................................................................
EG iterations: 284
-> the formula is TRUE

FORMULA ParamProductionCell-PT-2-CTLFireability-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 1m21sec


Total processing time: 5m9sec


BK_STOP 1432725245788

--------------------
content from stderr:

check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m0sec

1263 3249 8936 18616 22767 26159 28074 31114 32438 35213 34106 34092
iterations count:12683 (62), effective:526 (2)

initing FirstDep: 0m0sec


iterations count:208 (1), effective:1 (0)

iterations count:216 (1), effective:1 (0)

iterations count:204 (1), effective:1 (0)

iterations count:243 (1), effective:1 (0)
24956 25525
iterations count:2579 (12), effective:113 (0)
13037 20014 24752 28392 32071 34149
iterations count:6333 (31), effective:275 (1)
14010 21366 27648 29868 34165
iterations count:5835 (28), effective:249 (1)

iterations count:202 (1), effective:0 (0)
2891 5358 7308 10246 18610 28232 30757 33725
iterations count:8557 (42), effective:367 (1)
15201 16298 19019 25992 27020 33752
iterations count:6342 (31), effective:263 (1)

iterations count:215 (1), effective:1 (0)
10158 17853 21354 28446 31737 33833
iterations count:6537 (32), effective:277 (1)
14884 17086 20387 26353 29326 32764
iterations count:6882 (34), effective:288 (1)

iterations count:202 (1), effective:0 (0)
24105 28044 29284
iterations count:3261 (16), effective:129 (0)

iterations count:208 (1), effective:1 (0)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/user/u8/hulinhub/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-2.tgz
mv ParamProductionCell-PT-2 execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-2265"
echo " Executing tool marcie"
echo " Input is ParamProductionCell-PT-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r064kn-blw3-143254880200029"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "ReachabilityComputeBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;