fond
Model Checking Contest 2022
12th edition, Bergen, Norway, June 21, 2022
Execution of r291-smll-165463870300330
Last Updated
Jun 22, 2022

About the Execution of Tapaal for StigmergyElection-PT-07a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
745.512 36605.00 126538.00 30.10 FTFTTTTTFFFTFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2022-input.r291-smll-165463870300330.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2022-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool tapaal
Input is StigmergyElection-PT-07a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r291-smll-165463870300330
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 7.9K May 30 14:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K May 30 14:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 30 14:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 30 14:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 May 29 12:20 equiv_col
-rw-r--r-- 1 mcc users 4 May 29 12:20 instance
-rw-r--r-- 1 mcc users 6 May 29 12:20 iscolored
-rw-r--r-- 1 mcc users 3.4K May 25 13:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 25 13:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 25 13:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 25 13:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.8M May 29 12:20 model.pnml
-rw-r--r-- 1 mcc users 1 May 29 12:20 NewModel
-rw-r--r-- 1 mcc users 11K May 30 15:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K May 30 15:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K May 30 15:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 106K May 30 15:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 25 13:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 25 13:04 UpperBounds.xml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-00
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-01
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-02
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-03
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-04
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-05
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-06
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-07
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-08
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-09
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-10
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-11
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-12
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-13
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-14
FORMULA_NAME StigmergyElection-PT-07a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1654899647451

tapaal
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> tapaal --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z
MF=/home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3590 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

Time left: 3588

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)
Search strategy option was ignored as the TAR engine is called.
Query index 0 was solved

Query is satisfied.


Solved using Trace Abstraction Refinement

Spent 0.008774 on verification
@@@0.09,7408@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 1 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT TRACE_ABSTRACTION_REFINEMENT
Time left: 3587
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.207148 on verification
@@@0.26,61556@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 2 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3587
------------------- QUERY 3 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.322805 on verification
@@@0.37,66016@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 3 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3586
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.072874 on verification
@@@0.20,60036@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 4 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3585
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.068466 on verification
@@@0.20,60160@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 5 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3585
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.07237 on verification
@@@0.20,60288@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 6 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3584
------------------- QUERY 7 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.099011 on verification
@@@0.23,59924@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 7 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3584
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 9.53704 on verification
@@@9.69,204044@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 8 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3574
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 2.63106 on verification
@@@2.71,150280@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 9 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3571
------------------- QUERY 10 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 10.6317 on verification
@@@10.74,209364@@@


Query index 0 was solved
Query is NOT satisfied.

Spent 10.6689 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 10 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3560
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.086313 on verification
@@@0.19,60176@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 11 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3559
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.087842 on verification
@@@0.19,60140@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 12 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3559
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 3.16922 on verification
@@@3.29,159164@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 13 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3555
------------------- QUERY 14 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.100477 on verification
@@@0.18,60176@@@


Query index 0 was solved
Query is satisfied.

Spent 0.106768 on verification
@@@0.18,60168@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 14 -n
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 14 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3555
------------------- QUERY 15 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is NOT satisfied.

Spent 0.128514 on verification
@@@0.26,60196@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 15 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3554
------------------- QUERY 16 ----------------------
Solution found by parallel processing (step 1)


Query index 0 was solved
Query is satisfied.

Spent 0.146956 on verification
@@@0.31,60168@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ DFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.2h0L1HidfJ /home/mcc/BenchKit/bin/tmp/tmp.aCe0F3bV4z --binary-query-io 1 -x 16 -n

FORMULA StigmergyElection-PT-07a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 3553
All queries are solved
Time left: 3553
terminated-with-cleanup

BK_STOP 1654899684056

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-07a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool tapaal"
echo " Input is StigmergyElection-PT-07a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r291-smll-165463870300330"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-07a.tgz
mv StigmergyElection-PT-07a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;