fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r170-smll-158987815400129
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for FamilyReunion-COL-L00050M0005C002P002G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15789.320 3600000.00 3559858.00 43020.40 FFFTTTFFTTFTT?FF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r170-smll-158987815400129.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r170-smll-158987815400129
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 328K
-rw-r--r-- 1 mcc users 4.4K Apr 1 20:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 1 20:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 1 13:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 1 13:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 8 14:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 28 14:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Apr 8 14:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 28 14:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Apr 1 10:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Apr 1 10:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Apr 1 06:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 1 06:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 1 13:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 1 13:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 equiv_pt
-rw-r--r-- 1 mcc users 24 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 137K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-00
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-01
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-02
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-03
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-04
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-05
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-06
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-07
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-08
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-09
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-10
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-11
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-12
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-13
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-14
FORMULA_NAME FamilyReunion-COL-L00050M0005C002P002G001-15

=== Now, execution of the tool begins

BK_START 1591180225197

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-03 10:30:28] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-03 10:30:28] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-03 10:30:28] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
SLF4J: Failed to load class "org.slf4j.impl.StaticLoggerBinder".
SLF4J: Defaulting to no-operation (NOP) logger implementation
SLF4J: See http://www.slf4j.org/codes.html#StaticLoggerBinder for further details.
[2020-06-03 10:30:29] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1002 ms
[2020-06-03 10:30:29] [INFO ] sort/places :
Response->r0,
LxM->m1,ml0,l2,m2,lm1,l3,m3,ml1,l4,lm2,m4,m5,l5,ml2,l6,lm3,m6,m7,ml3,l7,m9,m10,ml4,
CINFORMI->c2,c4,c7,c0,c1,
LxP->p1,p3,p2,p5,p4,p6,p9,pl0,pl1,
LegalResident->lm0,l12,l0,l30,l31,lc1,l1,l32,lc2,l33,lc3,l34,cg0,l35,lg0,l36,l8,l9,lm4,l38,l10,l11,l13,l16,l14,lc0,l15,l17,l18,lp0,l19,lp1,l20,l21,l22,l24,l25,l23,l28,l26,l27,l29,
LxC->c3,cl2,c5,c6,cl0,cl1,
LxR->gl1,l37,l39,l40,
GovernmentCommission->g0,g2,g4,
PublicAdminOffice->p0,p7,p8,p10,p11,
MICSystem->m0,m8,m11,
LxG->g1,gl0,g3,

[2020-06-03 10:30:29] [INFO ] Detected 5 constant HL places corresponding to 17 PT places.
[2020-06-03 10:30:29] [INFO ] Imported 104 HL places and 66 HL transitions for a total of 12245 PT places and 10611.0 transition bindings in 42 ms.
[2020-06-03 10:30:29] [INFO ] Computed order based on color domains.
[2020-06-03 10:30:29] [INFO ] Unfolded HLPN to a Petri net with 12245 places and 10560 transitions in 140 ms.
[2020-06-03 10:30:29] [INFO ] Unfolded HLPN properties in 3 ms.
Deduced a syphon composed of 51 places in 80 ms
Reduce places removed 68 places and 0 transitions.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 375 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 100000 steps, including 34 resets, run finished after 5051 ms. (steps per millisecond=19 ) properties seen :[0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 1]
// Phase 1: matrix 10560 rows 12177 cols
[2020-06-03 10:30:36] [INFO ] Computed 2768 place invariants in 1689 ms
[2020-06-03 10:30:39] [INFO ] [Real]Absence check using 65 positive place invariants in 826 ms returned unsat
[2020-06-03 10:30:42] [INFO ] [Real]Absence check using 65 positive place invariants in 730 ms returned unsat
[2020-06-03 10:30:44] [INFO ] [Real]Absence check using 65 positive place invariants in 895 ms returned unsat
[2020-06-03 10:30:47] [INFO ] [Real]Absence check using 65 positive place invariants in 695 ms returned unsat
[2020-06-03 10:30:50] [INFO ] [Real]Absence check using 65 positive place invariants in 1460 ms returned sat
[2020-06-03 10:31:07] [INFO ] [Real]Absence check using 65 positive and 2703 generalized place invariants in 16978 ms returned (error "Failed to check-sat")
[2020-06-03 10:31:07] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-03 10:31:07] [WARNING] SMT solver failed with error :java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Error writing to Z3 solver: java.io.IOException: Stream closed") while checking expression at index 4
[2020-06-03 10:31:10] [INFO ] [Real]Absence check using 65 positive place invariants in 1031 ms returned unsat
[2020-06-03 10:31:13] [INFO ] [Real]Absence check using 65 positive place invariants in 970 ms returned unsat
[2020-06-03 10:31:16] [INFO ] [Real]Absence check using 65 positive place invariants in 920 ms returned unsat
[2020-06-03 10:31:19] [INFO ] [Real]Absence check using 65 positive place invariants in 1014 ms returned unsat
[2020-06-03 10:31:21] [INFO ] [Real]Absence check using 65 positive place invariants in 683 ms returned unsat
Successfully simplified 9 atomic propositions for a total of 11 simplifications.
[2020-06-03 10:31:22] [INFO ] Initial state reduction rules for CTL removed 8 formulas.
[2020-06-03 10:31:23] [INFO ] Flatten gal took : 917 ms
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA FamilyReunion-COL-L00050M0005C002P002G001-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-06-03 10:31:23] [INFO ] Applying decomposition
[2020-06-03 10:31:23] [INFO ] Flatten gal took : 534 ms
[2020-06-03 10:31:24] [INFO ] Decomposing Gal with order
[2020-06-03 10:31:25] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-06-03 10:31:28] [INFO ] Removed a total of 5308 redundant transitions.
[2020-06-03 10:31:28] [INFO ] Flatten gal took : 958 ms
[2020-06-03 10:31:29] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 50 ms.
[2020-06-03 10:31:52] [INFO ] Export to MCC properties in file /home/mcc/execution/LTLCardinality.sr.xml took 9 ms.
[2020-06-03 10:31:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 84 ms.
info: Time: 3600 - MCC
vrfy: Checking LTLCardinality @ FamilyReunion-COL-L00050M0005C002P002G001 @ 3570 seconds

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L00050M0005C002P002G001-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427364 kB
MemFree: 14352628 kB
After kill :
MemTotal: 16427364 kB
MemFree: 16320824 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00050M0005C002P002G001"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is FamilyReunion-COL-L00050M0005C002P002G001, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r170-smll-158987815400129"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00050M0005C002P002G001.tgz
mv FamilyReunion-COL-L00050M0005C002P002G001 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;