fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r107-oct2-155272231100548
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for Peterson-PT-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
12719.450 3600000.00 14266550.00 445.50 ?T?TTTT??FTFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272231100548.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is Peterson-PT-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272231100548
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 41K Feb 12 04:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 121K Feb 12 04:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 8 03:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 8 03:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 100 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 338 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 15K Feb 5 00:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 5 00:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 30K Feb 4 07:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 4 07:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 20K Feb 1 02:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 1 02:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 6.9K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 15K Feb 4 22:22 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 511K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552937092908

Working with output stream class java.io.PrintStream
FORMULA Peterson-PT-4-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-00 with value :((((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)>=2)&&(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)<=(((((((((((((((((((AskForSection_3_3+AskForSection_4_3)+AskForSection_1_3)+AskForSection_2_3)+AskForSection_4_2)+AskForSection_0_3)+AskForSection_2_2)+AskForSection_3_2)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_3_1)+AskForSection_4_1)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_0_1)+AskForSection_4_0)+AskForSection_3_0)+AskForSection_2_0)+AskForSection_1_0)+AskForSection_0_0))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-01 with value :((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)>=2)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-02 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)>=2)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)<=(((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-03 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=((((Idle_4+Idle_3)+Idle_2)+Idle_1)+Idle_0))&&(!((((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)<=(((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)<=(((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-05 with value :((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=2)
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-06 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)>=3)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)<=(((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)>=2))&&(((((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4))||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)<=(((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-07 with value :((((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)<=(((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-08 with value :(!(BeginLoop_3_1_4>=1))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-09 with value :((((BeginLoop_3_1_4<=TestIdentity_1_3_1)||(BeginLoop_3_3_4>=3))&&(IsEndLoop_3_3_1<=BeginLoop_2_0_1))&&((TestIdentity_3_3_1<=AskForSection_0_3)&&((WantSection_2_T<=BeginLoop_2_3_4)||(TestIdentity_1_1_2<=BeginLoop_4_3_1))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-10 with value :(IsEndLoop_1_1_2>=1)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-11 with value :(TestAlone_4_1_1<=TestAlone_2_0_3)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-12 with value :(TestAlone_1_1_0<=TestIdentity_3_1_2)
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-13 with value :(!((IsEndLoop_3_1_1<=TestIdentity_2_3_2)||(TestIdentity_3_2_0>=2)))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-14 with value :(((TestIdentity_3_1_0>=3)&&((IsEndLoop_4_3_4<=BeginLoop_0_3_4)&&(TestTurn_1_0>=2)))&&(TestIdentity_2_3_0<=IsEndLoop_1_2_2))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-15 with value :(TestIdentity_2_2_0<=TestAlone_1_2_0)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
FORMULA Peterson-PT-4-ReachabilityCardinality-05 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 29908 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 673 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 16101 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 59052 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 15340 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
LTSmin run took 91896 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 103504 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-10 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 30550 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 21215 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
LTSmin run took 98141 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 89483 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1920 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality00==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 78 ms
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 480 places.
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 690 transitions.
Mar 18, 2019 7:24:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 20 ms
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 111 ms
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 139 ms
Mar 18, 2019 7:24:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 155 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 621 ms.
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 137 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=0 took 4 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=0 took 2 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=0 took 5 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=0 took 14 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=0 took 1 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=0 took 13 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=0 took 10 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=0 took 14 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=0 took 13 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=0 took 13 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=0 took 1 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=0 took 8 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=0 took 9 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=0 took 10 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=0 took 0 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=1 took 19 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=1 took 18 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=1 took 42 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=1 took 60 ms
Mar 18, 2019 7:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=1 took 13 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=1 took 79 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=1 took 10 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=1 took 17 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=1 took 17 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=1 took 10 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=1 took 11 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 144 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=2 took 229 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=2 took 250 ms
Mar 18, 2019 7:24:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=2 took 342 ms
Mar 18, 2019 7:24:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=2 took 337 ms
Mar 18, 2019 7:24:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=2 took 213 ms
Mar 18, 2019 7:24:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=2 took 393 ms
Mar 18, 2019 7:24:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=2 took 312 ms
Mar 18, 2019 7:24:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=2 took 136 ms
Mar 18, 2019 7:24:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=2 took 462 ms
Mar 18, 2019 7:24:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=2 took 160 ms
Mar 18, 2019 7:24:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=2 took 395 ms
Mar 18, 2019 7:24:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=2 took 138 ms
Mar 18, 2019 7:24:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=2 took 108 ms
Mar 18, 2019 7:24:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=2 took 198 ms
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=2 took 150 ms
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 4556 ms
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 690 transitions.
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/690 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 690 transitions.
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 29 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 7:25:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 4470 ms
Mar 18, 2019 7:25:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=3 took 1048 ms
Mar 18, 2019 7:25:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-00
Mar 18, 2019 7:25:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-00(SAT) depth K=0 took 2212 ms
Mar 18, 2019 7:25:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-01
Mar 18, 2019 7:25:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-01(SAT) depth K=0 took 1893 ms
Mar 18, 2019 7:25:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-02
Mar 18, 2019 7:25:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-02(SAT) depth K=0 took 1918 ms
Mar 18, 2019 7:25:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-03
Mar 18, 2019 7:25:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-03(SAT) depth K=0 took 6114 ms
Mar 18, 2019 7:25:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=3 took 22000 ms
Mar 18, 2019 7:25:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-05
Mar 18, 2019 7:25:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-05
Mar 18, 2019 7:25:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-05(TRUE) depth K=0 took 11354 ms
Mar 18, 2019 7:25:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=3 took 2254 ms
Mar 18, 2019 7:25:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-06
Mar 18, 2019 7:25:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-06(SAT) depth K=0 took 3689 ms
Mar 18, 2019 7:25:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=3 took 2480 ms
Mar 18, 2019 7:25:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-07
Mar 18, 2019 7:25:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-07(SAT) depth K=0 took 2535 ms
Mar 18, 2019 7:25:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=3 took 3327 ms
Mar 18, 2019 7:25:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=3 took 3032 ms
Mar 18, 2019 7:25:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
Mar 18, 2019 7:25:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=0 took 7170 ms
Mar 18, 2019 7:25:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=3 took 5643 ms
Mar 18, 2019 7:25:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-09
Mar 18, 2019 7:25:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-09(SAT) depth K=0 took 3533 ms
Mar 18, 2019 7:25:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
Mar 18, 2019 7:25:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=0 took 5565 ms
Mar 18, 2019 7:25:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
Mar 18, 2019 7:25:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=0 took 2051 ms
Mar 18, 2019 7:25:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
Mar 18, 2019 7:25:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=0 took 3403 ms
Mar 18, 2019 7:25:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-13
Mar 18, 2019 7:25:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-13(SAT) depth K=0 took 6437 ms
Mar 18, 2019 7:25:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=3 took 19108 ms
Mar 18, 2019 7:26:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-4-ReachabilityCardinality-14
Mar 18, 2019 7:26:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-14
Mar 18, 2019 7:26:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-14(FALSE) depth K=0 took 5042 ms
Mar 18, 2019 7:26:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-15
Mar 18, 2019 7:26:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-15(SAT) depth K=0 took 16012 ms
Mar 18, 2019 7:26:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 690 transitions.
Mar 18, 2019 7:26:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/690) took 4568 ms. Total solver calls (SAT/UNSAT): 137(0/137)
Mar 18, 2019 7:26:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/690) took 9032 ms. Total solver calls (SAT/UNSAT): 274(0/274)
Mar 18, 2019 7:26:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/690) took 13242 ms. Total solver calls (SAT/UNSAT): 411(0/411)
Mar 18, 2019 7:26:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/690) took 17862 ms. Total solver calls (SAT/UNSAT): 548(0/548)
Mar 18, 2019 7:26:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/690) took 22573 ms. Total solver calls (SAT/UNSAT): 684(0/684)
Mar 18, 2019 7:26:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/690) took 27152 ms. Total solver calls (SAT/UNSAT): 820(0/820)
Mar 18, 2019 7:26:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/690) took 31776 ms. Total solver calls (SAT/UNSAT): 957(0/957)
Mar 18, 2019 7:26:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=3 took 60414 ms
Mar 18, 2019 7:27:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/690) took 36114 ms. Total solver calls (SAT/UNSAT): 1093(0/1093)
Mar 18, 2019 7:27:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/690) took 40641 ms. Total solver calls (SAT/UNSAT): 1228(0/1228)
Mar 18, 2019 7:27:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=3 took 6313 ms
Mar 18, 2019 7:27:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/690) took 45118 ms. Total solver calls (SAT/UNSAT): 1364(0/1364)
Mar 18, 2019 7:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/690) took 49736 ms. Total solver calls (SAT/UNSAT): 1500(0/1500)
Mar 18, 2019 7:27:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/690) took 53595 ms. Total solver calls (SAT/UNSAT): 1635(0/1635)
Mar 18, 2019 7:27:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=3 took 18082 ms
Mar 18, 2019 7:27:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/690) took 59704 ms. Total solver calls (SAT/UNSAT): 1905(0/1905)
Mar 18, 2019 7:27:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=3 took 1150 ms
Mar 18, 2019 7:27:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=3 took 1764 ms
Mar 18, 2019 7:27:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/690) took 63456 ms. Total solver calls (SAT/UNSAT): 2040(0/2040)
Mar 18, 2019 7:27:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/690) took 66939 ms. Total solver calls (SAT/UNSAT): 2174(0/2174)
Mar 18, 2019 7:27:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=3 took 6291 ms
Mar 18, 2019 7:27:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/690) took 70303 ms. Total solver calls (SAT/UNSAT): 2308(0/2308)
Mar 18, 2019 7:27:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/690) took 73763 ms. Total solver calls (SAT/UNSAT): 2442(0/2442)
Mar 18, 2019 7:27:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/690) took 77946 ms. Total solver calls (SAT/UNSAT): 2709(0/2709)
Mar 18, 2019 7:27:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/690) took 81206 ms. Total solver calls (SAT/UNSAT): 2976(0/2976)
Mar 18, 2019 7:27:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/690) took 84317 ms. Total solver calls (SAT/UNSAT): 3241(0/3241)
Mar 18, 2019 7:27:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/690) took 87427 ms. Total solver calls (SAT/UNSAT): 3507(0/3507)
Mar 18, 2019 7:27:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=3 took 20670 ms
Mar 18, 2019 7:27:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/690) took 91811 ms. Total solver calls (SAT/UNSAT): 3638(0/3638)
Mar 18, 2019 7:28:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/690) took 95463 ms. Total solver calls (SAT/UNSAT): 3770(0/3770)
Mar 18, 2019 7:28:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/690) took 99144 ms. Total solver calls (SAT/UNSAT): 3902(0/3902)
Mar 18, 2019 7:28:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/690) took 102380 ms. Total solver calls (SAT/UNSAT): 4034(0/4034)
Mar 18, 2019 7:28:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/690) took 105736 ms. Total solver calls (SAT/UNSAT): 4165(0/4165)
Mar 18, 2019 7:28:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/690) took 108853 ms. Total solver calls (SAT/UNSAT): 4428(0/4428)
Mar 18, 2019 7:28:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/690) took 112929 ms. Total solver calls (SAT/UNSAT): 4820(0/4820)
Mar 18, 2019 7:28:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/690) took 117070 ms. Total solver calls (SAT/UNSAT): 5080(0/5080)
Mar 18, 2019 7:28:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/690) took 121437 ms. Total solver calls (SAT/UNSAT): 5210(0/5210)
Mar 18, 2019 7:28:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/690) took 125409 ms. Total solver calls (SAT/UNSAT): 5340(0/5340)
Mar 18, 2019 7:28:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/690) took 128874 ms. Total solver calls (SAT/UNSAT): 5469(0/5469)
Mar 18, 2019 7:28:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/690) took 132196 ms. Total solver calls (SAT/UNSAT): 5598(0/5598)
Mar 18, 2019 7:28:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/690) took 136325 ms. Total solver calls (SAT/UNSAT): 5727(0/5727)
Mar 18, 2019 7:28:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/690) took 140571 ms. Total solver calls (SAT/UNSAT): 5856(0/5856)
Mar 18, 2019 7:28:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/690) took 144872 ms. Total solver calls (SAT/UNSAT): 5984(0/5984)
Mar 18, 2019 7:28:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/690) took 148102 ms. Total solver calls (SAT/UNSAT): 6113(0/6113)
Mar 18, 2019 7:28:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/690) took 153926 ms. Total solver calls (SAT/UNSAT): 6369(0/6369)
Mar 18, 2019 7:28:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-00
Mar 18, 2019 7:28:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-00(SAT) depth K=1 took 159150 ms
Mar 18, 2019 7:29:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/690) took 157295 ms. Total solver calls (SAT/UNSAT): 6497(0/6497)
Mar 18, 2019 7:29:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-01
Mar 18, 2019 7:29:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-01(SAT) depth K=1 took 5015 ms
Mar 18, 2019 7:29:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/690) took 160682 ms. Total solver calls (SAT/UNSAT): 6624(0/6624)
Mar 18, 2019 7:29:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/690) took 163766 ms. Total solver calls (SAT/UNSAT): 6751(0/6751)
Mar 18, 2019 7:29:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/690) took 167556 ms. Total solver calls (SAT/UNSAT): 6878(0/6878)
Mar 18, 2019 7:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/690) took 171623 ms. Total solver calls (SAT/UNSAT): 7006(0/7006)
Mar 18, 2019 7:29:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/690) took 175691 ms. Total solver calls (SAT/UNSAT): 7133(0/7133)
Mar 18, 2019 7:29:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/690) took 179644 ms. Total solver calls (SAT/UNSAT): 7259(0/7259)
Mar 18, 2019 7:29:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/690) took 183888 ms. Total solver calls (SAT/UNSAT): 7385(0/7385)
Mar 18, 2019 7:29:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/690) took 187343 ms. Total solver calls (SAT/UNSAT): 7511(0/7511)
Mar 18, 2019 7:29:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/690) took 191250 ms. Total solver calls (SAT/UNSAT): 7638(0/7638)
Mar 18, 2019 7:29:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/690) took 195107 ms. Total solver calls (SAT/UNSAT): 7764(0/7764)
Mar 18, 2019 7:29:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/690) took 199442 ms. Total solver calls (SAT/UNSAT): 7889(0/7889)
Mar 18, 2019 7:29:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/690) took 203694 ms. Total solver calls (SAT/UNSAT): 8014(0/8014)
Mar 18, 2019 7:29:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/690) took 207951 ms. Total solver calls (SAT/UNSAT): 8139(0/8139)
Mar 18, 2019 7:29:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/690) took 211785 ms. Total solver calls (SAT/UNSAT): 8265(0/8265)
Mar 18, 2019 7:30:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/690) took 215931 ms. Total solver calls (SAT/UNSAT): 8390(0/8390)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Mar 18, 2019 7:30:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 217449 ms. Total solver calls (SAT/UNSAT): 8402(1/8401)
Mar 18, 2019 7:30:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 690 transitions.
Mar 18, 2019 7:31:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 86439 ms. Total solver calls (SAT/UNSAT): 2647(0/2647)
Mar 18, 2019 7:31:29 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 394159ms conformant to PINS in folder :/home/mcc/execution
Mar 18, 2019 7:46:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=4 took 1092286 ms
Mar 18, 2019 7:54:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=4 took 498311 ms
Mar 18, 2019 8:10:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=4 took 959458 ms
Mar 18, 2019 8:17:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-02
Mar 18, 2019 8:17:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-02(SAT) depth K=1 took 2902123 ms
Mar 18, 2019 8:19:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-07
Mar 18, 2019 8:19:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-07(SAT) depth K=1 took 123618 ms
Mar 18, 2019 8:20:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=4 took 595277 ms
Mar 18, 2019 8:23:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=4 took 183413 ms
Mar 18, 2019 8:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
Mar 18, 2019 8:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=1 took 298147 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is Peterson-PT-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272231100548"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;