Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 4.4M
-rw-r--r-- 1 mcc users 3.6K May 30 00:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 30 00:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 28 21:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 28 21:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 09:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 28 07:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.3K May 27 12:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 27 12:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 26 14:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 26 14:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 4.2M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-6a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749150000438
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-00
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-01
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-02
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-03
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-04
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-05
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-06
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-07
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-08
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-09
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-10
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-11
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-12
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-13
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-14
FORMULA_NAME DLCflexbar-PT-6a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528063923217

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !((G("((u86.p602>=1)&&(u312.p888>=1))")))
Formula 0 simplified : !G"((u86.p602>=1)&&(u312.p888>=1))"
built 2801 ordering constraints for composite.
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Compilation finished in 343113 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 175 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
36736 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,371.161,1900968,1,0,572890,5987,62394,564432,423,4915,2965218
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F("((u20.p140>=1)&&(u971.p1547>=1))")))
Formula 1 simplified : !F"((u20.p140>=1)&&(u971.p1547>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
3379 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,404.955,2304552,1,0,572891,5987,25449,564435,156,4915,1210
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F(X(X(G(X("((u90.p639>=1)&&(u954.p1530>=1))")))))))
Formula 2 simplified : !FXXGX"((u90.p639>=1)&&(u954.p1530>=1))"
4 unique states visited
3 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
9527 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,500.224,2229652,1,0,851132,5987,46593,956886,370,4915,1254632
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((G(G(G(X(G("((u23.p161>=1)&&(u810.p1386>=1))")))))))
Formula 3 simplified : !GXG"((u23.p161>=1)&&(u810.p1386>=1))"
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]([](X([]((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
8710 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,587.331,2971752,1,0,1.46978e+06,5987,36082,2.01481e+06,276,4915,403096
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((X(X(X(F(F("((u54.p378>=1)&&(u1376.p1952>=1))")))))))
Formula 4 simplified : !XXXF"((u54.p378>=1)&&(u1376.p1952>=1))"
LTSmin run took 64746 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X(<>(<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2197 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1804 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP6==true))U((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
6495 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,652.279,2971752,1,0,1.46978e+06,5987,46565,2.01481e+06,370,4915,1821592
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X("((u38.p263>=1)&&(u167.p743>=1))")))
Formula 5 simplified : !X"((u38.p263>=1)&&(u167.p743>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,652.355,2971752,1,0,1.46978e+06,5987,46569,2.01481e+06,370,4915,1839338
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F(F(("((u30.p210>=1)&&(u992.p1568>=1))")U("((u76.p532>=1)&&(u411.p987>=1))")))))
Formula 6 simplified : !F("((u30.p210>=1)&&(u992.p1568>=1))" U "((u76.p532>=1)&&(u411.p987>=1))")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
3200 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,684.348,3055960,1,0,1.46978e+06,5987,48875,2.01481e+06,370,4915,1846117
no accepting run found
Formula 6 is TRUE no accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !(((F(("(u17.p117>=1)")U("((u70.p490>=1)&&(u399.p975>=1))")))U("((u87.p614>=1)&&(u558.p1134>=1))")))
Formula 7 simplified : !(F("(u17.p117>=1)" U "((u70.p490>=1)&&(u399.p975>=1))") U "((u87.p614>=1)&&(u558.p1134>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
11451 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,798.859,4310724,1,0,2.16425e+06,5987,54772,2.94957e+06,370,4915,2835819
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((G(X(X(F(X("((u84.p588>=1)&&(u932.p1508>=1))")))))))
Formula 8 simplified : !GXXFX"((u84.p588>=1)&&(u932.p1508>=1))"
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP6==true))U((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>(X((LTLAP11==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
6 unique states visited
6 strongly connected components in search stack
7 transitions explored
6 items max in DFS search stack
10288 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,901.742,4311212,1,0,2.16425e+06,5987,39254,2.94957e+06,276,4915,721837
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((F((G(G("((u87.p617>=1)&&(u430.p1006>=1))")))U(("((u92.p667>=1)&&(u1321.p1897>=1))")U("((u5.p32>=1)&&(u1109.p1685>=1))")))))
Formula 9 simplified : !F(G"((u87.p617>=1)&&(u430.p1006>=1))" U ("((u92.p667>=1)&&(u1321.p1897>=1))" U "((u5.p32>=1)&&(u1109.p1685>=1))"))
LTSmin run took 43767 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([]([]((LTLAP12==true))))U(((LTLAP13==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
7942 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,981.157,4311212,1,0,2.16425e+06,5987,48832,2.94957e+06,370,4915,1406135
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F((G("((u87.p611>=1)&&(u546.p1122>=1))"))U(("((u86.p606>=1)&&(u274.p850>=1))")U("((u87.p611>=1)&&(u582.p1158>=1))")))))
Formula 10 simplified : !F(G"((u87.p611>=1)&&(u546.p1122>=1))" U ("((u86.p606>=1)&&(u274.p850>=1))" U "((u87.p611>=1)&&(u582.p1158>=1))"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
3921 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1020.37,4311212,1,0,2.16425e+06,5987,52389,2.94957e+06,370,4915,1884371
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((X(F((G("((u1270.p1846>=1)&&(u92.p665>=1))"))U(X("((u13.p91>=1)&&(u1293.p1869>=1))"))))))
Formula 11 simplified : !XF(G"((u1270.p1846>=1)&&(u92.p665>=1))" U X"((u13.p91>=1)&&(u1293.p1869>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
3643 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1056.79,4311212,1,0,2.16425e+06,5987,54940,3.08288e+06,370,4915,2665442
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA DLCflexbar-PT-6a-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(((F(F("((u92.p663>=1)&&(u1306.p1882>=1))")))U(G(F(G("((u88.p621>=1)&&(u654.p1230>=1))"))))))
Formula 12 simplified : !(F"((u92.p663>=1)&&(u1306.p1882>=1))" U GFG"((u88.p621>=1)&&(u654.p1230>=1))")
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([]([]((LTLAP12==true))))U(((LTLAP13==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP20==true))))U([](<>([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP20==true))))U([](<>([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP22==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP22==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP23==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1213 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X(X((LTLAP24==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2096 ms.
FORMULA DLCflexbar-PT-6a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP20==true))))U([](<>([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP20==true))))U([](<>([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP22==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP22==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 10:12:05 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 10:12:05 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 10:12:05 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 618 ms
Jun 03, 2018 10:12:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2069 places.
Jun 03, 2018 10:12:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16077 transitions.
Jun 03, 2018 10:12:06 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 10:12:06 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 10:12:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2617 ms
Jun 03, 2018 10:12:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1541 ms
Jun 03, 2018 10:12:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 10:12:12 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1590 ms
Jun 03, 2018 10:12:12 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 10:12:15 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 27680 redundant transitions.
Jun 03, 2018 10:12:16 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 143 ms
Jun 03, 2018 10:12:16 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 03, 2018 10:12:17 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 1760 identical transitions.
Jun 03, 2018 10:12:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 14317 transitions.
Jun 03, 2018 10:12:17 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (14317) to apply POR reductions. Disabling POR matrices.
Jun 03, 2018 10:12:18 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2090ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP22==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-6a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-6a.tgz
mv DLCflexbar-PT-6a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-6a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749150000438"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;