fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r261-csrt-152732586000151
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for Peterson-COL-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15749.760 844469.00 1549783.00 303.90 FFTTFFFFF??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 44K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Peterson-COL-4, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732586000151
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-4-LTLCardinality-00
FORMULA_NAME Peterson-COL-4-LTLCardinality-01
FORMULA_NAME Peterson-COL-4-LTLCardinality-02
FORMULA_NAME Peterson-COL-4-LTLCardinality-03
FORMULA_NAME Peterson-COL-4-LTLCardinality-04
FORMULA_NAME Peterson-COL-4-LTLCardinality-05
FORMULA_NAME Peterson-COL-4-LTLCardinality-06
FORMULA_NAME Peterson-COL-4-LTLCardinality-07
FORMULA_NAME Peterson-COL-4-LTLCardinality-08
FORMULA_NAME Peterson-COL-4-LTLCardinality-09
FORMULA_NAME Peterson-COL-4-LTLCardinality-10
FORMULA_NAME Peterson-COL-4-LTLCardinality-11
FORMULA_NAME Peterson-COL-4-LTLCardinality-12
FORMULA_NAME Peterson-COL-4-LTLCardinality-13
FORMULA_NAME Peterson-COL-4-LTLCardinality-14
FORMULA_NAME Peterson-COL-4-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527504290505

10:44:52.677 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
10:44:52.680 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((G("(((((idle_0+idle_1)+idle_2)+idle_3)+idle_4)<=(((((((((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)+turn_12)+turn_13)+turn_14)+turn_15)+turn_16)+turn_17)+turn_18)+turn_19))"))U(G(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((isEndLoop_0+isEndLoop_1)+isEndLoop_2)+isEndLoop_3)+isEndLoop_4)+isEndLoop_5)+isEndLoop_6)+isEndLoop_7)+isEndLoop_8)+isEndLoop_9)+isEndLoop_10)+isEndLoop_11)+isEndLoop_12)+isEndLoop_13)+isEndLoop_14)+isEndLoop_15)+isEndLoop_16)+isEndLoop_17)+isEndLoop_18)+isEndLoop_19)+isEndLoop_20)+isEndLoop_21)+isEndLoop_22)+isEndLoop_23)+isEndLoop_24)+isEndLoop_25)+isEndLoop_26)+isEndLoop_27)+isEndLoop_28)+isEndLoop_29)+isEndLoop_30)+isEndLoop_31)+isEndLoop_32)+isEndLoop_33)+isEndLoop_34)+isEndLoop_35)+isEndLoop_36)+isEndLoop_37)+isEndLoop_38)+isEndLoop_39)+isEndLoop_40)+isEndLoop_41)+isEndLoop_42)+isEndLoop_43)+isEndLoop_44)+isEndLoop_45)+isEndLoop_46)+isEndLoop_47)+isEndLoop_48)+isEndLoop_49)+isEndLoop_50)+isEndLoop_51)+isEndLoop_52)+isEndLoop_53)+isEndLoop_54)+isEndLoop_55)+isEndLoop_56)+isEndLoop_57)+isEndLoop_58)+isEndLoop_59)+isEndLoop_60)+isEndLoop_61)+isEndLoop_62)+isEndLoop_63)+isEndLoop_64)+isEndLoop_65)+isEndLoop_66)+isEndLoop_67)+isEndLoop_68)+isEndLoop_69)+isEndLoop_70)+isEndLoop_71)+isEndLoop_72)+isEndLoop_73)+isEndLoop_74)+isEndLoop_75)+isEndLoop_76)+isEndLoop_77)+isEndLoop_78)+isEndLoop_79)+isEndLoop_80)+isEndLoop_81)+isEndLoop_82)+isEndLoop_83)+isEndLoop_84)+isEndLoop_85)+isEndLoop_86)+isEndLoop_87)+isEndLoop_88)+isEndLoop_89)+isEndLoop_90)+isEndLoop_91)+isEndLoop_92)+isEndLoop_93)+isEndLoop_94)+isEndLoop_95)+isEndLoop_96)+isEndLoop_97)+isEndLoop_98)+isEndLoop_99)>=3)")))))
Formula 0 simplified : !(G"(((((idle_0+idle_1)+idle_2)+idle_3)+idle_4)<=(((((((((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)+turn_12)+turn_13)+turn_14)+turn_15)+turn_16)+turn_17)+turn_18)+turn_19))" U GF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((isEndLoop_0+isEndLoop_1)+isEndLoop_2)+isEndLoop_3)+isEndLoop_4)+isEndLoop_5)+isEndLoop_6)+isEndLoop_7)+isEndLoop_8)+isEndLoop_9)+isEndLoop_10)+isEndLoop_11)+isEndLoop_12)+isEndLoop_13)+isEndLoop_14)+isEndLoop_15)+isEndLoop_16)+isEndLoop_17)+isEndLoop_18)+isEndLoop_19)+isEndLoop_20)+isEndLoop_21)+isEndLoop_22)+isEndLoop_23)+isEndLoop_24)+isEndLoop_25)+isEndLoop_26)+isEndLoop_27)+isEndLoop_28)+isEndLoop_29)+isEndLoop_30)+isEndLoop_31)+isEndLoop_32)+isEndLoop_33)+isEndLoop_34)+isEndLoop_35)+isEndLoop_36)+isEndLoop_37)+isEndLoop_38)+isEndLoop_39)+isEndLoop_40)+isEndLoop_41)+isEndLoop_42)+isEndLoop_43)+isEndLoop_44)+isEndLoop_45)+isEndLoop_46)+isEndLoop_47)+isEndLoop_48)+isEndLoop_49)+isEndLoop_50)+isEndLoop_51)+isEndLoop_52)+isEndLoop_53)+isEndLoop_54)+isEndLoop_55)+isEndLoop_56)+isEndLoop_57)+isEndLoop_58)+isEndLoop_59)+isEndLoop_60)+isEndLoop_61)+isEndLoop_62)+isEndLoop_63)+isEndLoop_64)+isEndLoop_65)+isEndLoop_66)+isEndLoop_67)+isEndLoop_68)+isEndLoop_69)+isEndLoop_70)+isEndLoop_71)+isEndLoop_72)+isEndLoop_73)+isEndLoop_74)+isEndLoop_75)+isEndLoop_76)+isEndLoop_77)+isEndLoop_78)+isEndLoop_79)+isEndLoop_80)+isEndLoop_81)+isEndLoop_82)+isEndLoop_83)+isEndLoop_84)+isEndLoop_85)+isEndLoop_86)+isEndLoop_87)+isEndLoop_88)+isEndLoop_89)+isEndLoop_90)+isEndLoop_91)+isEndLoop_92)+isEndLoop_93)+isEndLoop_94)+isEndLoop_95)+isEndLoop_96)+isEndLoop_97)+isEndLoop_98)+isEndLoop_99)>=3)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 670
// Phase 1: matrix 670 rows 500 cols
invariant :wantSection_4 + wantSection_5 = 1
invariant :idle_0 + wantSection_1 = 1
invariant :-1'wantSection_3 + askForSection_4 + askForSection_5 + askForSection_6 + askForSection_7 + testTurn_4 + testTurn_5 + testTurn_6 + testTurn_7 + beginLoop_20 + beginLoop_21 + beginLoop_22 + beginLoop_23 + beginLoop_24 + beginLoop_25 + beginLoop_26 + beginLoop_27 + beginLoop_28 + beginLoop_29 + beginLoop_30 + beginLoop_31 + beginLoop_32 + beginLoop_33 + beginLoop_34 + beginLoop_35 + beginLoop_36 + beginLoop_37 + beginLoop_38 + beginLoop_39 + endTurn_4 + endTurn_5 + endTurn_6 + endTurn_7 + CS_1 + testIdentity_20 + testIdentity_21 + testIdentity_22 + testIdentity_23 + testIdentity_24 + testIdentity_25 + testIdentity_26 + testIdentity_27 + testIdentity_28 + testIdentity_29 + testIdentity_30 + testIdentity_31 + testIdentity_32 + testIdentity_33 + testIdentity_34 + testIdentity_35 + testIdentity_36 + testIdentity_37 + testIdentity_38 + testIdentity_39 + testAlone_20 + testAlone_21 + testAlone_22 + testAlone_23 + testAlone_24 + testAlone_25 + testAlone_26 + testAlone_27 + testAlone_28 + testAlone_29 + testAlone_30 + testAlone_31 + testAlone_32 + testAlone_33 + testAlone_34 + testAlone_35 + testAlone_36 + testAlone_37 + testAlone_38 + testAlone_39 + isEndLoop_20 + isEndLoop_21 + isEndLoop_22 + isEndLoop_23 + isEndLoop_24 + isEndLoop_25 + isEndLoop_26 + isEndLoop_27 + isEndLoop_28 + isEndLoop_29 + isEndLoop_30 + isEndLoop_31 + isEndLoop_32 + isEndLoop_33 + isEndLoop_34 + isEndLoop_35 + isEndLoop_36 + isEndLoop_37 + isEndLoop_38 + isEndLoop_39 = 0
invariant :turn_10 + turn_11 + turn_12 + turn_13 + turn_14 = 1
invariant :wantSection_0 + wantSection_1 = 1
invariant :turn_15 + turn_16 + turn_17 + turn_18 + turn_19 = 1
invariant :-1'wantSection_1 + askForSection_0 + askForSection_1 + askForSection_2 + askForSection_3 + testTurn_0 + testTurn_1 + testTurn_2 + testTurn_3 + beginLoop_0 + beginLoop_1 + beginLoop_2 + beginLoop_3 + beginLoop_4 + beginLoop_5 + beginLoop_6 + beginLoop_7 + beginLoop_8 + beginLoop_9 + beginLoop_10 + beginLoop_11 + beginLoop_12 + beginLoop_13 + beginLoop_14 + beginLoop_15 + beginLoop_16 + beginLoop_17 + beginLoop_18 + beginLoop_19 + endTurn_0 + endTurn_1 + endTurn_2 + endTurn_3 + CS_0 + testIdentity_0 + testIdentity_1 + testIdentity_2 + testIdentity_3 + testIdentity_4 + testIdentity_5 + testIdentity_6 + testIdentity_7 + testIdentity_8 + testIdentity_9 + testIdentity_10 + testIdentity_11 + testIdentity_12 + testIdentity_13 + testIdentity_14 + testIdentity_15 + testIdentity_16 + testIdentity_17 + testIdentity_18 + testIdentity_19 + testAlone_0 + testAlone_1 + testAlone_2 + testAlone_3 + testAlone_4 + testAlone_5 + testAlone_6 + testAlone_7 + testAlone_8 + testAlone_9 + testAlone_10 + testAlone_11 + testAlone_12 + testAlone_13 + testAlone_14 + testAlone_15 + testAlone_16 + testAlone_17 + testAlone_18 + testAlone_19 + isEndLoop_0 + isEndLoop_1 + isEndLoop_2 + isEndLoop_3 + isEndLoop_4 + isEndLoop_5 + isEndLoop_6 + isEndLoop_7 + isEndLoop_8 + isEndLoop_9 + isEndLoop_10 + isEndLoop_11 + isEndLoop_12 + isEndLoop_13 + isEndLoop_14 + isEndLoop_15 + isEndLoop_16 + isEndLoop_17 + isEndLoop_18 + isEndLoop_19 = 0
invariant :wantSection_6 + wantSection_7 = 1
invariant :turn_0 + turn_1 + turn_2 + turn_3 + turn_4 = 1
invariant :idle_2 + wantSection_5 = 1
invariant :-1'wantSection_7 + askForSection_12 + askForSection_13 + askForSection_14 + askForSection_15 + testTurn_12 + testTurn_13 + testTurn_14 + testTurn_15 + beginLoop_60 + beginLoop_61 + beginLoop_62 + beginLoop_63 + beginLoop_64 + beginLoop_65 + beginLoop_66 + beginLoop_67 + beginLoop_68 + beginLoop_69 + beginLoop_70 + beginLoop_71 + beginLoop_72 + beginLoop_73 + beginLoop_74 + beginLoop_75 + beginLoop_76 + beginLoop_77 + beginLoop_78 + beginLoop_79 + endTurn_12 + endTurn_13 + endTurn_14 + endTurn_15 + CS_3 + testIdentity_60 + testIdentity_61 + testIdentity_62 + testIdentity_63 + testIdentity_64 + testIdentity_65 + testIdentity_66 + testIdentity_67 + testIdentity_68 + testIdentity_69 + testIdentity_70 + testIdentity_71 + testIdentity_72 + testIdentity_73 + testIdentity_74 + testIdentity_75 + testIdentity_76 + testIdentity_77 + testIdentity_78 + testIdentity_79 + testAlone_60 + testAlone_61 + testAlone_62 + testAlone_63 + testAlone_64 + testAlone_65 + testAlone_66 + testAlone_67 + testAlone_68 + testAlone_69 + testAlone_70 + testAlone_71 + testAlone_72 + testAlone_73 + testAlone_74 + testAlone_75 + testAlone_76 + testAlone_77 + testAlone_78 + testAlone_79 + isEndLoop_60 + isEndLoop_61 + isEndLoop_62 + isEndLoop_63 + isEndLoop_64 + isEndLoop_65 + isEndLoop_66 + isEndLoop_67 + isEndLoop_68 + isEndLoop_69 + isEndLoop_70 + isEndLoop_71 + isEndLoop_72 + isEndLoop_73 + isEndLoop_74 + isEndLoop_75 + isEndLoop_76 + isEndLoop_77 + isEndLoop_78 + isEndLoop_79 = 0
invariant :idle_4 + wantSection_9 = 1
invariant :wantSection_2 + wantSection_3 = 1
invariant :-1'wantSection_9 + askForSection_16 + askForSection_17 + askForSection_18 + askForSection_19 + testTurn_16 + testTurn_17 + testTurn_18 + testTurn_19 + beginLoop_80 + beginLoop_81 + beginLoop_82 + beginLoop_83 + beginLoop_84 + beginLoop_85 + beginLoop_86 + beginLoop_87 + beginLoop_88 + beginLoop_89 + beginLoop_90 + beginLoop_91 + beginLoop_92 + beginLoop_93 + beginLoop_94 + beginLoop_95 + beginLoop_96 + beginLoop_97 + beginLoop_98 + beginLoop_99 + endTurn_16 + endTurn_17 + endTurn_18 + endTurn_19 + CS_4 + testIdentity_80 + testIdentity_81 + testIdentity_82 + testIdentity_83 + testIdentity_84 + testIdentity_85 + testIdentity_86 + testIdentity_87 + testIdentity_88 + testIdentity_89 + testIdentity_90 + testIdentity_91 + testIdentity_92 + testIdentity_93 + testIdentity_94 + testIdentity_95 + testIdentity_96 + testIdentity_97 + testIdentity_98 + testIdentity_99 + testAlone_80 + testAlone_81 + testAlone_82 + testAlone_83 + testAlone_84 + testAlone_85 + testAlone_86 + testAlone_87 + testAlone_88 + testAlone_89 + testAlone_90 + testAlone_91 + testAlone_92 + testAlone_93 + testAlone_94 + testAlone_95 + testAlone_96 + testAlone_97 + testAlone_98 + testAlone_99 + isEndLoop_80 + isEndLoop_81 + isEndLoop_82 + isEndLoop_83 + isEndLoop_84 + isEndLoop_85 + isEndLoop_86 + isEndLoop_87 + isEndLoop_88 + isEndLoop_89 + isEndLoop_90 + isEndLoop_91 + isEndLoop_92 + isEndLoop_93 + isEndLoop_94 + isEndLoop_95 + isEndLoop_96 + isEndLoop_97 + isEndLoop_98 + isEndLoop_99 = 0
invariant :wantSection_8 + wantSection_9 = 1
invariant :idle_3 + wantSection_7 = 1
invariant :idle_1 + wantSection_3 = 1
invariant :-1'wantSection_5 + askForSection_8 + askForSection_9 + askForSection_10 + askForSection_11 + testTurn_8 + testTurn_9 + testTurn_10 + testTurn_11 + beginLoop_40 + beginLoop_41 + beginLoop_42 + beginLoop_43 + beginLoop_44 + beginLoop_45 + beginLoop_46 + beginLoop_47 + beginLoop_48 + beginLoop_49 + beginLoop_50 + beginLoop_51 + beginLoop_52 + beginLoop_53 + beginLoop_54 + beginLoop_55 + beginLoop_56 + beginLoop_57 + beginLoop_58 + beginLoop_59 + endTurn_8 + endTurn_9 + endTurn_10 + endTurn_11 + CS_2 + testIdentity_40 + testIdentity_41 + testIdentity_42 + testIdentity_43 + testIdentity_44 + testIdentity_45 + testIdentity_46 + testIdentity_47 + testIdentity_48 + testIdentity_49 + testIdentity_50 + testIdentity_51 + testIdentity_52 + testIdentity_53 + testIdentity_54 + testIdentity_55 + testIdentity_56 + testIdentity_57 + testIdentity_58 + testIdentity_59 + testAlone_40 + testAlone_41 + testAlone_42 + testAlone_43 + testAlone_44 + testAlone_45 + testAlone_46 + testAlone_47 + testAlone_48 + testAlone_49 + testAlone_50 + testAlone_51 + testAlone_52 + testAlone_53 + testAlone_54 + testAlone_55 + testAlone_56 + testAlone_57 + testAlone_58 + testAlone_59 + isEndLoop_40 + isEndLoop_41 + isEndLoop_42 + isEndLoop_43 + isEndLoop_44 + isEndLoop_45 + isEndLoop_46 + isEndLoop_47 + isEndLoop_48 + isEndLoop_49 + isEndLoop_50 + isEndLoop_51 + isEndLoop_52 + isEndLoop_53 + isEndLoop_54 + isEndLoop_55 + isEndLoop_56 + isEndLoop_57 + isEndLoop_58 + isEndLoop_59 = 0
invariant :turn_5 + turn_6 + turn_7 + turn_8 + turn_9 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9298 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 84 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]((LTLAP0==true)))U([](<>((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1372 ms.
FORMULA Peterson-COL-4-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X((LTLAP2==true)))U(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 80 ms.
FORMULA Peterson-COL-4-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1363 ms.
FORMULA Peterson-COL-4-LTLCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP5==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 38 ms.
FORMULA Peterson-COL-4-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([]((LTLAP7==true)))U((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1324 ms.
FORMULA Peterson-COL-4-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1320 ms.
FORMULA Peterson-COL-4-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1350 ms.
FORMULA Peterson-COL-4-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA Peterson-COL-4-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([]([]((LTLAP12==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 91 ms.
FORMULA Peterson-COL-4-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP13==true))U((LTLAP14==true)))U(X([]((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP13==true))U((LTLAP14==true)))U(X([]((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 32 groups

BK_STOP 1527505134974

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:44:52 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:44:52 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:44:52 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 879 ms
May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 28, 2018 10:44:53 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 10:44:53 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 28, 2018 10:44:53 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 61.0 instantiations of transitions. Total transitions/syncs built is 738
May 28, 2018 10:44:53 AM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 5 uncalled transitions from type Peterson_COL_4
May 28, 2018 10:44:53 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 192 ms
May 28, 2018 10:44:54 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 12 ms
May 28, 2018 10:44:54 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 3 ms
May 28, 2018 10:44:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 718 transitions. Expanding to a total of 733 deterministic transitions.
May 28, 2018 10:44:54 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 9 ms.
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 176 ms
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 500 variables to be positive in 925 ms
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 730 transitions.
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/730 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 52 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 730 transitions.
May 28, 2018 10:44:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:45:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 730 transitions.
May 28, 2018 10:45:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/730) took 27 ms. Total solver calls (SAT/UNSAT): 41(20/21)
May 28, 2018 10:45:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/730) took 3046 ms. Total solver calls (SAT/UNSAT): 2350(1853/497)
May 28, 2018 10:45:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/730) took 6250 ms. Total solver calls (SAT/UNSAT): 4729(3894/835)
May 28, 2018 10:45:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/730) took 9254 ms. Total solver calls (SAT/UNSAT): 7179(5901/1278)
May 28, 2018 10:45:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/730) took 12432 ms. Total solver calls (SAT/UNSAT): 9670(8025/1645)
May 28, 2018 10:45:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/730) took 15577 ms. Total solver calls (SAT/UNSAT): 10972(9072/1900)
May 28, 2018 10:45:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/730) took 18734 ms. Total solver calls (SAT/UNSAT): 13260(10991/2269)
May 28, 2018 10:45:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/730) took 21847 ms. Total solver calls (SAT/UNSAT): 15735(13020/2715)
May 28, 2018 10:45:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/730) took 24933 ms. Total solver calls (SAT/UNSAT): 18094(15009/3085)
May 28, 2018 10:46:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/730) took 28027 ms. Total solver calls (SAT/UNSAT): 20301(16959/3342)
May 28, 2018 10:46:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/730) took 31185 ms. Total solver calls (SAT/UNSAT): 22573(19005/3568)
May 28, 2018 10:46:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/730) took 34318 ms. Total solver calls (SAT/UNSAT): 24676(21006/3670)
May 28, 2018 10:46:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/730) took 37509 ms. Total solver calls (SAT/UNSAT): 26746(22962/3784)
May 28, 2018 10:46:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/730) took 40557 ms. Total solver calls (SAT/UNSAT): 28799(24873/3926)
May 28, 2018 10:46:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/730) took 43612 ms. Total solver calls (SAT/UNSAT): 30919(26862/4057)
May 28, 2018 10:46:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/730) took 46708 ms. Total solver calls (SAT/UNSAT): 33024(28919/4105)
May 28, 2018 10:46:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(226/730) took 51284 ms. Total solver calls (SAT/UNSAT): 34939(30602/4337)
May 28, 2018 10:46:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/730) took 54409 ms. Total solver calls (SAT/UNSAT): 35071(30618/4453)
May 28, 2018 10:46:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/730) took 57556 ms. Total solver calls (SAT/UNSAT): 35203(30634/4569)
May 28, 2018 10:46:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(229/730) took 60682 ms. Total solver calls (SAT/UNSAT): 35335(30650/4685)
May 28, 2018 10:46:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/730) took 63796 ms. Total solver calls (SAT/UNSAT): 37710(33025/4685)
May 28, 2018 10:46:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/730) took 66929 ms. Total solver calls (SAT/UNSAT): 40107(35422/4685)
May 28, 2018 10:46:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(294/730) took 69942 ms. Total solver calls (SAT/UNSAT): 42405(37720/4685)
May 28, 2018 10:46:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/730) took 73041 ms. Total solver calls (SAT/UNSAT): 44712(40027/4685)
May 28, 2018 10:46:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(341/730) took 76149 ms. Total solver calls (SAT/UNSAT): 47016(42331/4685)
May 28, 2018 10:46:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(364/730) took 79253 ms. Total solver calls (SAT/UNSAT): 49099(44414/4685)
May 28, 2018 10:46:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(389/730) took 82289 ms. Total solver calls (SAT/UNSAT): 51255(46570/4685)
May 28, 2018 10:46:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(415/730) took 85327 ms. Total solver calls (SAT/UNSAT): 53352(48667/4685)
May 28, 2018 10:47:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(442/730) took 88332 ms. Total solver calls (SAT/UNSAT): 55392(50707/4685)
May 28, 2018 10:47:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(471/730) took 91353 ms. Total solver calls (SAT/UNSAT): 57428(52743/4685)
May 28, 2018 10:47:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(502/730) took 94434 ms. Total solver calls (SAT/UNSAT): 59406(54721/4685)
May 28, 2018 10:47:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(511/730) took 99492 ms. Total solver calls (SAT/UNSAT): 60032(55268/4764)
May 28, 2018 10:47:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(512/730) took 106285 ms. Total solver calls (SAT/UNSAT): 60153(55369/4784)
May 28, 2018 10:47:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(513/730) took 113413 ms. Total solver calls (SAT/UNSAT): 60273(55469/4804)
May 28, 2018 10:47:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(514/730) took 121356 ms. Total solver calls (SAT/UNSAT): 60392(55568/4824)
May 28, 2018 10:47:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(517/730) took 130047 ms. Total solver calls (SAT/UNSAT): 60702(55780/4922)
May 28, 2018 10:47:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(518/730) took 136906 ms. Total solver calls (SAT/UNSAT): 60820(55878/4942)
May 28, 2018 10:47:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(519/730) took 144776 ms. Total solver calls (SAT/UNSAT): 60937(55975/4962)
May 28, 2018 10:48:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(521/730) took 149072 ms. Total solver calls (SAT/UNSAT): 61168(56166/5002)
May 28, 2018 10:48:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(523/730) took 158404 ms. Total solver calls (SAT/UNSAT): 61355(56276/5079)
May 28, 2018 10:48:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(524/730) took 166302 ms. Total solver calls (SAT/UNSAT): 61470(56371/5099)
May 28, 2018 10:48:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(526/730) took 170670 ms. Total solver calls (SAT/UNSAT): 61697(56558/5139)
May 28, 2018 10:48:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(527/730) took 176361 ms. Total solver calls (SAT/UNSAT): 61809(56650/5159)
May 28, 2018 10:48:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(529/730) took 186324 ms. Total solver calls (SAT/UNSAT): 61991(56756/5235)
May 28, 2018 10:48:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(531/730) took 190361 ms. Total solver calls (SAT/UNSAT): 62214(56939/5275)
May 28, 2018 10:48:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(532/730) took 195722 ms. Total solver calls (SAT/UNSAT): 62324(57029/5295)
May 28, 2018 10:48:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(533/730) took 200981 ms. Total solver calls (SAT/UNSAT): 62433(57118/5315)
May 28, 2018 10:49:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(536/730) took 206953 ms. Total solver calls (SAT/UNSAT): 62672(57228/5444)
May 28, 2018 10:49:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(537/730) took 212293 ms. Total solver calls (SAT/UNSAT): 62777(57313/5464)
May 28, 2018 10:49:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(538/730) took 217754 ms. Total solver calls (SAT/UNSAT): 62881(57397/5484)
May 28, 2018 10:49:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(539/730) took 224083 ms. Total solver calls (SAT/UNSAT): 62984(57480/5504)
May 28, 2018 10:49:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(542/730) took 230679 ms. Total solver calls (SAT/UNSAT): 63253(57656/5597)
May 28, 2018 10:49:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(543/730) took 235873 ms. Total solver calls (SAT/UNSAT): 63355(57738/5617)
May 28, 2018 10:49:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(544/730) took 242072 ms. Total solver calls (SAT/UNSAT): 63456(57819/5637)
May 28, 2018 10:49:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(546/730) took 245517 ms. Total solver calls (SAT/UNSAT): 63655(57978/5677)
May 28, 2018 10:49:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(548/730) took 252383 ms. Total solver calls (SAT/UNSAT): 63817(58068/5749)
May 28, 2018 10:49:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(549/730) took 258743 ms. Total solver calls (SAT/UNSAT): 63916(58147/5769)
May 28, 2018 10:49:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(551/730) took 262126 ms. Total solver calls (SAT/UNSAT): 64111(58302/5809)
May 28, 2018 10:50:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(552/730) took 266220 ms. Total solver calls (SAT/UNSAT): 64207(58378/5829)
May 28, 2018 10:50:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(554/730) took 274158 ms. Total solver calls (SAT/UNSAT): 64364(58464/5900)
May 28, 2018 10:50:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(556/730) took 277324 ms. Total solver calls (SAT/UNSAT): 64555(58615/5940)
May 28, 2018 10:50:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(557/730) took 281372 ms. Total solver calls (SAT/UNSAT): 64649(58689/5960)
May 28, 2018 10:50:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(558/730) took 285373 ms. Total solver calls (SAT/UNSAT): 64742(58762/5980)
May 28, 2018 10:50:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(561/730) took 289916 ms. Total solver calls (SAT/UNSAT): 64947(58848/6099)
May 28, 2018 10:50:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(562/730) took 293670 ms. Total solver calls (SAT/UNSAT): 65036(58917/6119)
May 28, 2018 10:50:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(563/730) took 297527 ms. Total solver calls (SAT/UNSAT): 65124(58985/6139)
May 28, 2018 10:50:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(564/730) took 302507 ms. Total solver calls (SAT/UNSAT): 65211(59052/6159)
May 28, 2018 10:50:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(567/730) took 307083 ms. Total solver calls (SAT/UNSAT): 65439(59192/6247)
May 28, 2018 10:50:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(568/730) took 310733 ms. Total solver calls (SAT/UNSAT): 65525(59258/6267)
May 28, 2018 10:50:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(569/730) took 315630 ms. Total solver calls (SAT/UNSAT): 65610(59323/6287)
May 28, 2018 10:50:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(572/730) took 319686 ms. Total solver calls (SAT/UNSAT): 65830(59456/6374)
May 28, 2018 10:50:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(573/730) took 323227 ms. Total solver calls (SAT/UNSAT): 65914(59520/6394)
May 28, 2018 10:51:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(574/730) took 328101 ms. Total solver calls (SAT/UNSAT): 65997(59583/6414)
May 28, 2018 10:51:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(577/730) took 333851 ms. Total solver calls (SAT/UNSAT): 66240(59766/6474)
May 28, 2018 10:51:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(579/730) took 339492 ms. Total solver calls (SAT/UNSAT): 66372(59832/6540)
May 28, 2018 10:51:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(582/730) took 345033 ms. Total solver calls (SAT/UNSAT): 66609(60009/6600)
May 28, 2018 10:51:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(584/730) took 348772 ms. Total solver calls (SAT/UNSAT): 66735(60070/6665)
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(587/730) took 353736 ms. Total solver calls (SAT/UNSAT): 66930(60181/6749)
May 28, 2018 10:51:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(589/730) took 360073 ms. Total solver calls (SAT/UNSAT): 67073(60284/6789)
May 28, 2018 10:51:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(593/730) took 365400 ms. Total solver calls (SAT/UNSAT): 67330(60438/6892)
May 28, 2018 10:51:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(594/730) took 369003 ms. Total solver calls (SAT/UNSAT): 67399(60487/6912)
May 28, 2018 10:51:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(598/730) took 373965 ms. Total solver calls (SAT/UNSAT): 67646(60632/7014)
May 28, 2018 10:51:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(599/730) took 377712 ms. Total solver calls (SAT/UNSAT): 67713(60679/7034)
May 28, 2018 10:51:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(602/730) took 381803 ms. Total solver calls (SAT/UNSAT): 67908(60814/7094)
May 28, 2018 10:51:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(604/730) took 385406 ms. Total solver calls (SAT/UNSAT): 68015(60860/7155)
May 28, 2018 10:52:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(607/730) took 389281 ms. Total solver calls (SAT/UNSAT): 68204(60989/7215)
May 28, 2018 10:52:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(627/730) took 392311 ms. Total solver calls (SAT/UNSAT): 68950(61564/7386)
May 28, 2018 10:52:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(711/730) took 395320 ms. Total solver calls (SAT/UNSAT): 70461(62756/7705)
May 28, 2018 10:52:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 395528 ms. Total solver calls (SAT/UNSAT): 70485(62780/7705)
May 28, 2018 10:52:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 730 transitions.
May 28, 2018 10:52:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2790 ms. Total solver calls (SAT/UNSAT): 1961(0/1961)
May 28, 2018 10:52:12 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 437956ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-4"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-4.tgz
mv Peterson-COL-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Peterson-COL-4, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732586000151"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;